From patchwork Mon Jul 15 08:50:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kewen.Lin" X-Patchwork-Id: 1131890 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-505081-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="vr2qjmJ+"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45nHL93hD2z9sDQ for ; Mon, 15 Jul 2019 18:50:39 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to:cc :from:subject:date:mime-version:content-type :content-transfer-encoding:message-id; q=dns; s=default; b=Yo/jr QYhJnH155lK93GZsZyqN1C2RNnplVSkm7cUQV4bwe7p8Im+BlMj8o336CgmQhK87 ccKNMEtsa9m3nc4rToTl9kvivJnFQsfBUeQf3gMQVHwJnZCXQPLFZ9tWnQD43xNl GZT32LYQtISd4sWyT98pUHTJGBnQY/j1DBL9Ek= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to:cc :from:subject:date:mime-version:content-type :content-transfer-encoding:message-id; s=default; bh=Ii1jCG4k11x q10g34YFINOoIf8A=; b=vr2qjmJ+JYe+IE5Yri5E2uCpe8/VDVyK0JbA29S9SnC AfYtLh5LN10cDeM/xFka4/T5QKgYgZMDn+2r9hYMPb6tZjRZKU73MWu0cWVuReEG +mp7HLv6WFO2BaX334qSmjKrHI2cY1A7XcS5xdEwhj9XtxBbKkmJ33sENpYOKewA = Received: (qmail 105333 invoked by alias); 15 Jul 2019 08:50:32 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 105322 invoked by uid 89); 15 Jul 2019 08:50:32 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-19.0 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.1 spammy=miss X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.156.1) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 15 Jul 2019 08:50:31 +0000 Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x6F8leB8017329 for ; Mon, 15 Jul 2019 04:50:27 -0400 Received: from e06smtp01.uk.ibm.com (e06smtp01.uk.ibm.com [195.75.94.97]) by mx0a-001b2d01.pphosted.com with ESMTP id 2trjnxghd2-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Mon, 15 Jul 2019 04:50:27 -0400 Received: from localhost by e06smtp01.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Mon, 15 Jul 2019 09:50:22 +0100 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06avi18626390.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x6F8o8tl35520886 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 15 Jul 2019 08:50:08 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E82D5A405D; Mon, 15 Jul 2019 08:50:21 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 34874A4040; Mon, 15 Jul 2019 08:50:20 +0000 (GMT) Received: from kewenlins-mbp.cn.ibm.com (unknown [9.200.146.186]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 15 Jul 2019 08:50:19 +0000 (GMT) To: GCC Patches Cc: Richard Biener , Jakub Jelinek , richard.sandiford@arm.com From: "Kewen.Lin" Subject: Check rrotate optab first when transforming lrotate Date: Mon, 15 Jul 2019 16:50:13 +0800 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.14; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 x-cbid: 19071508-4275-0000-0000-0000034D118C X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19071508-4276-0000-0000-0000385D1F53 Message-Id: <232a38b1-76c2-476d-1be0-a1958e5624bb@linux.ibm.com> X-IsSubscribed: yes Hi all, In match.pd and expmed.c, we have some codes to transform lrotate to rrotate if rotation count is const. But they don't consider the target whether supports the rrotate. It leads to some suboptimal generated code since some optimization can't get expected result by querying target optab. One typical case is that we miss some rotation vectorization opportunity on Power. This patch is to teach them to check target optab availability first. Regression testing just launched, is it OK for trunk if it passed and bootstrapped? Thanks, Kewen ----------------------------------------------- gcc/ChangeLog 2019-07-15 Kewen Lin * expmed.c (expand_shift_1): Only transform to opposite rotate when it's supported on the target. * match.pd (lrot N -> rrot N'): Check target support or not. gcc/testsuite/ChangeLog 2019-07-15 Kewen Lin * gcc.target/powerpc/vec_rotate.c: New test. diff --git a/gcc/expmed.c b/gcc/expmed.c index d7f8e9a5d76..6cd3341a0e4 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -2491,7 +2491,9 @@ expand_shift_1 (enum tree_code code, machine_mode mode, rtx shifted, if (rotate && CONST_INT_P (op1) && IN_RANGE (INTVAL (op1), GET_MODE_BITSIZE (scalar_mode) / 2 + left, - GET_MODE_BITSIZE (scalar_mode) - 1)) + GET_MODE_BITSIZE (scalar_mode) - 1) + && ((left && optab_handler (rrotate_optab, mode) != CODE_FOR_nothing) || + (!left && optab_handler (lrotate_optab, mode) != CODE_FOR_nothing))) { op1 = gen_int_shift_amount (mode, (GET_MODE_BITSIZE (scalar_mode) - INTVAL (op1))); diff --git a/gcc/match.pd b/gcc/match.pd index 88dae4231d8..a63cd15e129 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -2418,11 +2418,14 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) /* Rewrite an LROTATE_EXPR by a constant into an RROTATE_EXPR by a new constant. */ + (simplify (lrotate @0 INTEGER_CST@1) + (if ((VECTOR_TYPE_P (type) && target_supports_op_p (type, RROTATE_EXPR, optab_vector)) + || (!VECTOR_TYPE_P (type) && target_supports_op_p (type, RROTATE_EXPR, optab_scalar))) (rrotate @0 { const_binop (MINUS_EXPR, TREE_TYPE (@1), build_int_cst (TREE_TYPE (@1), - element_precision (type)), @1); })) + element_precision (type)), @1); }))) /* Turn (a OP c1) OP c2 into a OP (c1+c2). */ (for op (lrotate rrotate rshift lshift) diff --git a/gcc/testsuite/gcc.target/powerpc/vec_rotate.c b/gcc/testsuite/gcc.target/powerpc/vec_rotate.c new file mode 100644 index 00000000000..16d1f297d2d --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec_rotate.c @@ -0,0 +1,47 @@ +/* { dg-options "-O3" } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ + +/* Check LROTATE to RROTATE transformation on const rotation count is disabled + on Power by checking optab, it helps vectorizer to exploit vector rotation + instructions. */ + +#define N 256 +unsigned long long sud[N], rud[N]; +unsigned int suw[N], ruw[N]; +unsigned short suh[N], ruh[N]; +unsigned char sub[N], rub[N]; + +void +testULL () +{ + for (int i = 0; i < 256; ++i) + rud[i] = (sud[i] >> 8) | (sud[i] << (sizeof (sud[0]) * 8 - 8)); +} + +void +testUW () +{ + for (int i = 0; i < 256; ++i) + ruw[i] = (suw[i] >> 8) | (suw[i] << (sizeof (suw[0]) * 8 - 8)); +} + +void +testUH () +{ + for (int i = 0; i < 256; ++i) + ruh[i] = (unsigned short) (suh[i] >> 9) + | (unsigned short) (suh[i] << (sizeof (suh[0]) * 8 - 9)); +} + +void +testUB () +{ + for (int i = 0; i < 256; ++i) + rub[i] = (unsigned char) (sub[i] >> 5) + | (unsigned char) (sub[i] << (sizeof (sub[0]) * 8 - 5)); +} + +/* { dg-final { scan-assembler {\mvrld\M} } } */ +/* { dg-final { scan-assembler {\mvrlw\M} } } */ +/* { dg-final { scan-assembler {\mvrlh\M} } } */ +/* { dg-final { scan-assembler {\mvrlb\M} } } */