diff mbox series

[v2] i386: Zero extend 32-bit address to 64-bit with option -mx32 -maddress-mode=long. [PR 117418]

Message ID 20241108065319.3012078-1-lin1.hu@intel.com
State New
Headers show
Series [v2] i386: Zero extend 32-bit address to 64-bit with option -mx32 -maddress-mode=long. [PR 117418] | expand

Commit Message

Hu, Lin1 Nov. 8, 2024, 6:53 a.m. UTC
Thanks for your suggestions and answer.

This is the current version. There is no problem in my test environment, but
also in the further testing, sent for review.

BRs,
Lin

-maddress-mode=long let Pmode = DI_mode, so zero extend 32-bit address to
64-bit and uses a 64-bit register as a pointer for avoid raise an ICE.

gcc/ChangeLog:

	PR target/117418
	* config/i386/i386-expand.cc (ix86_expand_builtin): Convert
	pointer's mode according to Pmode.

gcc/testsuite/ChangeLog:

	PR target/117418
	* gcc.target/i386/pr117418-1.c: New test.
---
 gcc/config/i386/i386-expand.cc             | 12 +++++++++++
 gcc/testsuite/gcc.target/i386/pr117418-1.c | 23 ++++++++++++++++++++++
 2 files changed, 35 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr117418-1.c

Comments

Uros Bizjak Nov. 8, 2024, 9:13 a.m. UTC | #1
On Fri, Nov 8, 2024 at 7:53 AM Hu, Lin1 <lin1.hu@intel.com> wrote:
>
> Thanks for your suggestions and answer.
>
> This is the current version. There is no problem in my test environment, but
> also in the further testing, sent for review.
>
> BRs,
> Lin
>
> -maddress-mode=long let Pmode = DI_mode, so zero extend 32-bit address to
> 64-bit and uses a 64-bit register as a pointer for avoid raise an ICE.
>
> gcc/ChangeLog:
>
>         PR target/117418
>         * config/i386/i386-expand.cc (ix86_expand_builtin): Convert
>         pointer's mode according to Pmode.
>
> gcc/testsuite/ChangeLog:
>
>         PR target/117418
>         * gcc.target/i386/pr117418-1.c: New test.
> ---
>  gcc/config/i386/i386-expand.cc             | 12 +++++++++++
>  gcc/testsuite/gcc.target/i386/pr117418-1.c | 23 ++++++++++++++++++++++
>  2 files changed, 35 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/i386/pr117418-1.c
>
> diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
> index 6eef27f3fcd..a99ef9613f5 100644
> --- a/gcc/config/i386/i386-expand.cc
> +++ b/gcc/config/i386/i386-expand.cc
> @@ -14064,6 +14064,9 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
>        op1 = expand_normal (arg1);
>        op2 = expand_normal (arg2);
>
> +      if (GET_MODE (op1) != Pmode)
> +       op1 = convert_to_mode (Pmode, op1, 1);
> +
>        if (!address_operand (op2, VOIDmode))
>         {
>           op2 = convert_memory_address (Pmode, op2);
> @@ -14099,6 +14102,9 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
>        emit_label (ok_label);
>        emit_insn (gen_rtx_SET (target, pat));
>
> +      if (GET_MODE (op0) != Pmode)
> +       op0 = convert_to_mode (Pmode, op0, 1);
> +
>        for (i = 0; i < 8; i++)
>         {
>           op = gen_rtx_MEM (V2DImode,
> @@ -14123,6 +14129,9 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
>         if (!REG_P (op0))
>           op0 = copy_to_mode_reg (SImode, op0);
>
> +       if (GET_MODE (op2) != Pmode)
> +         op2 = convert_to_mode (Pmode, op2, 1);
> +
>         op = gen_rtx_REG (V2DImode, GET_SSE_REGNO (0));
>         emit_move_insn (op, op1);
>
> @@ -14160,6 +14169,9 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
>         if (!REG_P (op0))
>           op0 = copy_to_mode_reg (SImode, op0);
>
> +       if (GET_MODE (op3) != Pmode)
> +         op3 = convert_to_mode (Pmode, op3, 1);
> +
>         /* Force to use xmm0, xmm1 for keylow, keyhi*/
>         op = gen_rtx_REG (V2DImode, GET_SSE_REGNO (0));
>         emit_move_insn (op, op1);
> diff --git a/gcc/testsuite/gcc.target/i386/pr117418-1.c b/gcc/testsuite/gcc.target/i386/pr117418-1.c
> new file mode 100644
> index 00000000000..0eb48401c96
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr117418-1.c
> @@ -0,0 +1,23 @@
> +/* PR target/117418 */
> +/* { dg-do compile } */

-mx32 is not valid for ia32 and some targets do not support -mx32. So, you need:

/* { dg-do compile { target { ! ia32 } } } */
/* { dg-require-effective-target maybe_x32 } */

as evident from many testcases in testsuite/gcc.target/i386/ directory.

Uros.

> +/* { dg-options "-maddress-mode=long -mwidekl -mx32" } */
> +/* { dg-final { scan-assembler-times "aesdec128kl" 1 } } */
> +/* { dg-final { scan-assembler-times "aesdec256kl" 1 } } */
> +/* { dg-final { scan-assembler-times "aesenc128kl" 1 } } */
> +/* { dg-final { scan-assembler-times "aesenc256kl" 1 } } */
> +/* { dg-final { scan-assembler-times "encodekey128" 1 } } */
> +/* { dg-final { scan-assembler-times "encodekey256" 1 } } */
> +
> +typedef __attribute__((__vector_size__(16))) long long V;
> +V a;
> +
> +void
> +foo()
> +{
> +    __builtin_ia32_aesdec128kl_u8 (&a, a, &a);
> +    __builtin_ia32_aesdec256kl_u8 (&a, a, &a);
> +    __builtin_ia32_aesenc128kl_u8 (&a, a, &a);
> +    __builtin_ia32_aesenc256kl_u8 (&a, a, &a);
> +    __builtin_ia32_encodekey128_u32 (0, a, &a);
> +    __builtin_ia32_encodekey256_u32 (0, a, a, &a);
> +}
> --
> 2.31.1
>
diff mbox series

Patch

diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index 6eef27f3fcd..a99ef9613f5 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -14064,6 +14064,9 @@  ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
       op1 = expand_normal (arg1);
       op2 = expand_normal (arg2);
 
+      if (GET_MODE (op1) != Pmode)
+	op1 = convert_to_mode (Pmode, op1, 1);
+
       if (!address_operand (op2, VOIDmode))
 	{
 	  op2 = convert_memory_address (Pmode, op2);
@@ -14099,6 +14102,9 @@  ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
       emit_label (ok_label);
       emit_insn (gen_rtx_SET (target, pat));
 
+      if (GET_MODE (op0) != Pmode)
+	op0 = convert_to_mode (Pmode, op0, 1);
+
       for (i = 0; i < 8; i++)
 	{
 	  op = gen_rtx_MEM (V2DImode,
@@ -14123,6 +14129,9 @@  ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
 	if (!REG_P (op0))
 	  op0 = copy_to_mode_reg (SImode, op0);
 
+	if (GET_MODE (op2) != Pmode)
+	  op2 = convert_to_mode (Pmode, op2, 1);
+
 	op = gen_rtx_REG (V2DImode, GET_SSE_REGNO (0));
 	emit_move_insn (op, op1);
 
@@ -14160,6 +14169,9 @@  ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
 	if (!REG_P (op0))
 	  op0 = copy_to_mode_reg (SImode, op0);
 
+	if (GET_MODE (op3) != Pmode)
+	  op3 = convert_to_mode (Pmode, op3, 1);
+
 	/* Force to use xmm0, xmm1 for keylow, keyhi*/
 	op = gen_rtx_REG (V2DImode, GET_SSE_REGNO (0));
 	emit_move_insn (op, op1);
diff --git a/gcc/testsuite/gcc.target/i386/pr117418-1.c b/gcc/testsuite/gcc.target/i386/pr117418-1.c
new file mode 100644
index 00000000000..0eb48401c96
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr117418-1.c
@@ -0,0 +1,23 @@ 
+/* PR target/117418 */
+/* { dg-do compile } */
+/* { dg-options "-maddress-mode=long -mwidekl -mx32" } */
+/* { dg-final { scan-assembler-times "aesdec128kl" 1 } } */
+/* { dg-final { scan-assembler-times "aesdec256kl" 1 } } */
+/* { dg-final { scan-assembler-times "aesenc128kl" 1 } } */
+/* { dg-final { scan-assembler-times "aesenc256kl" 1 } } */
+/* { dg-final { scan-assembler-times "encodekey128" 1 } } */
+/* { dg-final { scan-assembler-times "encodekey256" 1 } } */
+
+typedef __attribute__((__vector_size__(16))) long long V;
+V a;
+
+void
+foo()
+{
+    __builtin_ia32_aesdec128kl_u8 (&a, a, &a);
+    __builtin_ia32_aesdec256kl_u8 (&a, a, &a);
+    __builtin_ia32_aesenc128kl_u8 (&a, a, &a);
+    __builtin_ia32_aesenc256kl_u8 (&a, a, &a);
+    __builtin_ia32_encodekey128_u32 (0, a, &a); 
+    __builtin_ia32_encodekey256_u32 (0, a, a, &a); 
+}