@@ -636,6 +636,22 @@ get_intel_cpu (struct __processor_model *cpu_model,
default:
break;
}
+ /* Parse family and model for family 0x13. */
+ else if (cpu_model2->__cpu_family == 0x13)
+ switch (cpu_model2->__cpu_model)
+ {
+ case 0x00:
+ case 0x01:
+ /* Diamond Rapids. */
+ cpu = "diamondrapids";
+ CHECK___builtin_cpu_is ("corei7");
+ CHECK___builtin_cpu_is ("diamondrapids");
+ cpu_model->__cpu_type = INTEL_COREI7;
+ cpu_model->__cpu_subtype = INTEL_COREI7_DIAMONDRAPIDS;
+ break;
+ default:
+ break;
+ }
return cpu;
}
@@ -2206,6 +2206,7 @@ const char *const processor_names[] =
"arrowlake",
"arrowlake-s",
"pantherlake",
+ "diamondrapids",
"intel",
"lujiazui",
"yongfeng",
@@ -2343,6 +2344,8 @@ const pta processor_alias_table[] =
M_CPU_SUBTYPE (INTEL_COREI7_ARROWLAKE_S), P_PROC_AVX2},
{"pantherlake", PROCESSOR_PANTHERLAKE, CPU_HASWELL, PTA_PANTHERLAKE,
M_CPU_SUBTYPE (INTEL_COREI7_PANTHERLAKE), P_PROC_AVX2},
+ {"diamondrapids", PROCESSOR_DIAMONDRAPIDS, CPU_HASWELL, PTA_DIAMONDRAPIDS,
+ M_CPU_SUBTYPE (INTEL_COREI7_DIAMONDRAPIDS), P_PROC_AVX512F},
{"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL,
M_CPU_TYPE (INTEL_BONNELL), P_PROC_SSSE3},
{"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL,
@@ -105,6 +105,7 @@ enum processor_subtypes
ZHAOXIN_FAM7H_YONGFENG,
AMDFAM1AH_ZNVER5,
ZHAOXIN_FAM7H_SHIJIDADAO,
+ INTEL_COREI7_DIAMONDRAPIDS,
CPU_SUBTYPE_MAX
};
@@ -721,7 +721,7 @@ skylake goldmont goldmont-plus tremont cascadelake tigerlake cooperlake \
sapphirerapids alderlake rocketlake eden-x2 nano nano-1000 nano-2000 nano-3000 \
nano-x2 eden-x4 nano-x4 lujiazui yongfeng shijidadao x86-64 x86-64-v2 \
x86-64-v3 x86-64-v4 sierraforest graniterapids graniterapids-d grandridge \
-arrowlake arrowlake-s clearwaterforest pantherlake native"
+arrowlake arrowlake-s clearwaterforest pantherlake diamondrapids native"
# Additional x86 processors supported by --with-cpu=. Each processor
# MUST be separated by exactly one space.
@@ -581,6 +581,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
processor = PROCESSOR_PENTIUM;
break;
case 6:
+ case 19:
processor = PROCESSOR_PENTIUMPRO;
break;
case 15:
@@ -623,11 +624,14 @@ const char *host_detect_local_cpu (int argc, const char **argv)
{
if (arch)
{
- /* This is unknown family 0x6 CPU. */
+ /* This is unknown CPU. */
if (has_feature (FEATURE_AVX512F))
{
+ /* Assume Diamond Rapids. */
+ if (has_feature (FEATURE_AVX10_2_512))
+ cpu = "diamondrapids";
/* Assume Granite Rapids D. */
- if (has_feature (FEATURE_AMX_COMPLEX))
+ else if (has_feature (FEATURE_AMX_COMPLEX))
cpu = "graniterapids-d";
/* Assume Granite Rapids. */
else if (has_feature (FEATURE_AMX_FP16))
@@ -291,6 +291,10 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
def_or_undef (parse_in, "__pantherlake");
def_or_undef (parse_in, "__pantherlake__");
break;
+ case PROCESSOR_DIAMONDRAPIDS:
+ def_or_undef (parse_in, "__diamondrapids");
+ def_or_undef (parse_in, "__diamondrapids__");
+ break;
/* use PROCESSOR_max to not set/unset the arch macro. */
case PROCESSOR_max:
@@ -491,6 +495,9 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
case PROCESSOR_PANTHERLAKE:
def_or_undef (parse_in, "__tune_pantherlake__");
break;
+ case PROCESSOR_DIAMONDRAPIDS:
+ def_or_undef (parse_in, "__tune_diamondrapids__");
+ break;
case PROCESSOR_INTEL:
case PROCESSOR_GENERIC:
break;
@@ -132,10 +132,12 @@ along with GCC; see the file COPYING3. If not see
#define m_ARROWLAKE (HOST_WIDE_INT_1U<<PROCESSOR_ARROWLAKE)
#define m_ARROWLAKE_S (HOST_WIDE_INT_1U<<PROCESSOR_ARROWLAKE_S)
#define m_PANTHERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_PANTHERLAKE)
+#define m_DIAMONDRAPIDS (HOST_WIDE_INT_1U<<PROCESSOR_DIAMONDRAPIDS)
#define m_CORE_AVX512 (m_SKYLAKE_AVX512 | m_CANNONLAKE \
| m_ICELAKE_CLIENT | m_ICELAKE_SERVER | m_CASCADELAKE \
| m_TIGERLAKE | m_COOPERLAKE | m_SAPPHIRERAPIDS \
- | m_ROCKETLAKE | m_GRANITERAPIDS | m_GRANITERAPIDS_D)
+ | m_ROCKETLAKE | m_GRANITERAPIDS | m_GRANITERAPIDS_D \
+ | m_DIAMONDRAPIDS)
#define m_CORE_AVX2 (m_HASWELL | m_SKYLAKE | m_CORE_AVX512)
#define m_CORE_ALL (m_CORE2 | m_NEHALEM | m_SANDYBRIDGE | m_CORE_AVX2)
#define m_CORE_HYBRID (m_ALDERLAKE | m_ARROWLAKE | m_ARROWLAKE_S \
@@ -800,6 +802,7 @@ static const struct processor_costs *processor_cost_table[] =
&alderlake_cost,
&alderlake_cost,
&alderlake_cost,
+ &icelake_cost,
&intel_cost,
&lujiazui_cost,
&yongfeng_cost,
@@ -2311,6 +2311,7 @@ enum processor_type
PROCESSOR_ARROWLAKE,
PROCESSOR_ARROWLAKE_S,
PROCESSOR_PANTHERLAKE,
+ PROCESSOR_DIAMONDRAPIDS,
PROCESSOR_INTEL,
PROCESSOR_LUJIAZUI,
PROCESSOR_YONGFENG,
@@ -2434,6 +2435,16 @@ constexpr wide_int_bitmask PTA_CLEARWATERFOREST = PTA_SIERRAFOREST
| PTA_AVXVNNIINT16 | PTA_SHA512 | PTA_SM3 | PTA_SM4 | PTA_USER_MSR
| PTA_PREFETCHI;
constexpr wide_int_bitmask PTA_PANTHERLAKE = PTA_ARROWLAKE_S | PTA_PREFETCHI;
+constexpr wide_int_bitmask PTA_DIAMONDRAPIDS = PTA_SKYLAKE | PTA_PKU | PTA_SHA
+ | PTA_GFNI | PTA_VAES | PTA_VPCLMULQDQ | PTA_RDPID | PTA_PCONFIG
+ | PTA_WBNOINVD | PTA_CLWB | PTA_MOVDIRI | PTA_MOVDIR64B | PTA_ENQCMD
+ | PTA_CLDEMOTE | PTA_PTWRITE | PTA_WAITPKG | PTA_SERIALIZE | PTA_TSXLDTRK
+ | PTA_AMX_TILE | PTA_AMX_INT8 | PTA_AMX_BF16 | PTA_UINTR | PTA_AVXVNNI
+ | PTA_AMX_FP16 | PTA_PREFETCHI | PTA_AMX_COMPLEX | PTA_AVX10_1_512
+ | PTA_AVXIFMA | PTA_AVXNECONVERT | PTA_AVXVNNIINT16 | PTA_AVXVNNIINT8
+ | PTA_CMPCCXADD | PTA_SHA512 | PTA_SM3 | PTA_SM4 | PTA_AVX10_2_512
+ | PTA_APX_F | PTA_AMX_AVX512 | PTA_AMX_FP8 | PTA_AMX_TF32 | PTA_AMX_TRANSPOSE
+ | PTA_MOVRS | PTA_AMX_MOVRS | PTA_USER_MSR;
constexpr wide_int_bitmask PTA_BDVER1 = PTA_64BIT | PTA_MMX | PTA_SSE
| PTA_SSE2 | PTA_SSE3 | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_SSSE3
@@ -26607,6 +26607,9 @@ Intel Core i7 Arrow Lake S CPU.
@item pantherlake
Intel Core i7 Panther Lake CPU.
+@item diamondrapids
+Intel Core i7 Diamond Rapids CPU.
+
@item bonnell
Intel Atom Bonnell CPU.
@@ -34620,6 +34620,20 @@ MOVDIRI, MOVDIR64B, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE, TSXLDTRK,
UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16, AVX512BF16, AMX-FP16,
PREFETCHI and AMX-COMPLEX instruction set support.
+@item diamondrapids
+Intel Diamond Rapids CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,
+SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE,
+RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW,
+AES, CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ,
+AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2,
+VPCLMULQDQ, AVX512BITALG, RDPID, AVX512VPOPCNTDQ, PCONFIG, WBNOINVD, CLWB,
+MOVDIRI, MOVDIR64B, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE, TSXLDTRK,
+UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16, AVX512BF16, AMX-FP16,
+PREFETCHI, AMX-COMPLEX, AVX10.1-512, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT16,
+AVX-VNNI-INT8, CMPccXADD, SHA512, SM3, SM4, AVX10.2-512, APX_F, AMX-AVX512,
+AMX-FP8, AMX-TF32, AMX-TRANSPOSE, MOVRS, AMX-MOVRS and USER_MSR instruction set
+support.
+
@item bonnell
@itemx atom
Intel Bonnell CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3 and SSSE3
@@ -124,6 +124,10 @@ int __attribute__ ((target("arch=pantherlake"))) foo () {
return 32;
}
+int __attribute__ ((target("arch=diamondrapids"))) foo () {
+ return 33;
+}
+
int main ()
{
int val = foo ();
@@ -178,6 +182,8 @@ int main ()
assert (val == 31);
else if (__builtin_cpu_is ("pantherlake"))
assert (val == 32);
+ else if (__builtin_cpu_is ("diamondrapids"))
+ assert (val == 33);
else
assert (val == 0);
@@ -220,6 +220,7 @@ extern void test_arch_graniterapids_d (void) __attribute__((__target__("arch=gra
extern void test_arch_arrowlake (void) __attribute__((__target__("arch=arrowlake")));
extern void test_arch_arrowlake_s (void) __attribute__((__target__("arch=arrowlake-s")));
extern void test_arch_pantherlake (void) __attribute__((__target__("arch=pantherlake")));
+extern void test_arch_diamondrapids (void) __attribute__((__target__("arch=diamondrapids")));
extern void test_arch_lujiazui (void) __attribute__((__target__("arch=lujiazui")));
extern void test_arch_yongfeng (void) __attribute__((__target__("arch=yongfeng")));
extern void test_arch_shijidadao (void) __attribute__((__target__("arch=shijidadao")));