From patchwork Thu Oct 31 13:23:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yury Khrustalev X-Patchwork-Id: 2004655 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XfPpt0sWtz1xwc for ; Fri, 1 Nov 2024 00:24:21 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id B93253857738 for ; Thu, 31 Oct 2024 13:24:19 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 4D4673857709; Thu, 31 Oct 2024 13:23:49 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4D4673857709 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 4D4673857709 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1730381033; cv=none; b=HYBwx4N86C9+a0frIEReIZoq8yZ9tHbQa7Y5oiv3ZopvXa+GeKg1PGZdC6RHdbAa1L8Uhsa4zk2OwtRaVog/h5enM2/w/eF2Tp1z6UguoOci7HaXLRyPJys/jVxjubw5pKACRosL5QbD+XcEAsg9LT5++hstm7ck9AwMoGhgPQU= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1730381033; c=relaxed/simple; bh=Q+PWsHfdVObq7DBT38qe95vA2Y8pfNarFVa6EgPKqzo=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=TrPwfQ5Zks0U2ZalXUzDer2nTFtq7wDV7JYBoJzBYIxCgmmNSNOm2SE2jTk+V/5iqx5qKU985Cwlg9Fdgjxd7h6Iprsufx0NDZEMuT/DE/5jMe2PcRARKibHxlfKWXfG0DLfP/0OOgthbCyuzVWDa3thrWYxGDJqdG4t1Wgw7Ps= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D9D311063; Thu, 31 Oct 2024 06:24:18 -0700 (PDT) Received: from udebian.localdomain (unknown [10.1.31.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 550693F528; Thu, 31 Oct 2024 06:23:48 -0700 (PDT) From: Yury Khrustalev To: gcc-patches@gcc.gnu.org Cc: nsz@gcc.gnu.org, richard.earnshaw@arm.com, matthieu.longo@arm.com, richard.ball@arm.com, richard.sandiford@arm.com Subject: [PATCH v2 03/21] aarch64: Add support for chkfeat insn Date: Thu, 31 Oct 2024 13:23:05 +0000 Message-Id: <20241031132323.948159-4-yury.khrustalev@arm.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241031132323.948159-1-yury.khrustalev@arm.com> References: <20241031132323.948159-1-yury.khrustalev@arm.com> MIME-Version: 1.0 X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org From: Szabolcs Nagy This is a hint space instruction to check for enabled HW features and update the x16 register accordingly. Use unspec_volatile to prevent reordering it around calls since calls can enable or disable HW features. gcc/ChangeLog: * config/aarch64/aarch64.md (aarch64_chkfeat): New. --- gcc/config/aarch64/aarch64.md | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 20956fc49d8..3f78cb787ce 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -381,6 +381,7 @@ (define_c_enum "unspecv" [ UNSPECV_BTI_C ; Represent BTI c. UNSPECV_BTI_J ; Represent BTI j. UNSPECV_BTI_JC ; Represent BTI jc. + UNSPECV_CHKFEAT ; Represent CHKFEAT X16. UNSPECV_TSTART ; Represent transaction start. UNSPECV_TCOMMIT ; Represent transaction commit. UNSPECV_TCANCEL ; Represent transaction cancel. @@ -8311,6 +8312,14 @@ (define_insn "aarch64_restore_nzcv" "msr\tnzcv, %0" ) +;; CHKFEAT instruction +(define_insn "aarch64_chkfeat" + [(set (reg:DI R16_REGNUM) + (unspec_volatile:DI [(reg:DI R16_REGNUM)] UNSPECV_CHKFEAT))] + "" + "hint\\t40 // chkfeat x16" +) + ;; AdvSIMD Stuff (include "aarch64-simd.md")