@@ -1121,4 +1121,6 @@ extern void aarch64_adjust_reg_alloc_order ();
bool aarch64_optimize_mode_switching (aarch64_mode_entity);
void aarch64_restore_za (rtx);
+extern bool aarch64_gcs_enabled ();
+
#endif /* GCC_AARCH64_PROTOS_H */
@@ -8531,6 +8531,13 @@ aarch_bti_j_insn_p (rtx_insn *insn)
return GET_CODE (pat) == UNSPEC_VOLATILE && XINT (pat, 1) == UNSPECV_BTI_J;
}
+/* Return TRUE if Guarded Control Stack is enabled. */
+bool
+aarch64_gcs_enabled (void)
+{
+ return (aarch64_enable_gcs == 1);
+}
+
/* Check if X (or any sub-rtx of X) is a PACIASP/PACIBSP instruction. */
bool
aarch_pac_insn_p (rtx x)
@@ -18911,6 +18918,7 @@ aarch64_handle_no_branch_protection (void)
{
aarch_ra_sign_scope = AARCH_FUNCTION_NONE;
aarch_enable_bti = 0;
+ aarch64_enable_gcs = 0;
}
static void
@@ -18919,6 +18927,7 @@ aarch64_handle_standard_branch_protection (void)
aarch_ra_sign_scope = AARCH_FUNCTION_NON_LEAF;
aarch64_ra_sign_key = AARCH64_KEY_A;
aarch_enable_bti = 1;
+ aarch64_enable_gcs = 1;
}
static void
@@ -18945,6 +18954,11 @@ aarch64_handle_bti_protection (void)
{
aarch_enable_bti = 1;
}
+static void
+aarch64_handle_gcs_protection (void)
+{
+ aarch64_enable_gcs = 1;
+}
static const struct aarch_branch_protect_type aarch64_pac_ret_subtypes[] = {
{ "leaf", false, aarch64_handle_pac_ret_leaf, NULL, 0 },
@@ -18959,6 +18973,7 @@ static const struct aarch_branch_protect_type aarch64_branch_protect_types[] =
{ "pac-ret", false, aarch64_handle_pac_ret_protection,
aarch64_pac_ret_subtypes, ARRAY_SIZE (aarch64_pac_ret_subtypes) },
{ "bti", false, aarch64_handle_bti_protection, NULL, 0 },
+ { "gcs", false, aarch64_handle_gcs_protection, NULL, 0 },
{ NULL, false, NULL, NULL, 0 }
};
@@ -19058,6 +19073,15 @@ aarch64_override_options (void)
#endif
}
+ if (aarch64_enable_gcs == 2)
+ {
+#ifdef TARGET_ENABLE_GCS
+ aarch64_enable_gcs = 1;
+#else
+ aarch64_enable_gcs = 0;
+#endif
+ }
+
/* Return address signing is currently not supported for ILP32 targets. For
LP64 targets use the configured option in the absence of a command-line
option for -mbranch-protection. */
@@ -45,6 +45,9 @@ uint64_t aarch64_isa_flags_1 = 0
TargetVariable
unsigned aarch_enable_bti = 2
+TargetVariable
+unsigned aarch64_enable_gcs = 2
+
TargetVariable
enum aarch64_key_type aarch64_ra_sign_key = AARCH64_KEY_A
@@ -28044,7 +28044,7 @@ if test "${enable_standard_branch_protection+set}" = set; then :
enableval=$enable_standard_branch_protection;
case $enableval in
yes)
- tm_defines="${tm_defines} TARGET_ENABLE_BTI=1 TARGET_ENABLE_PAC_RET=1"
+ tm_defines="${tm_defines} TARGET_ENABLE_BTI=1 TARGET_ENABLE_PAC_RET=1 TARGET_ENABLE_GCS=1"
;;
no)
;;
@@ -4392,14 +4392,14 @@ case "$target" in
AC_ARG_ENABLE(standard-branch-protection,
[
AS_HELP_STRING([--enable-standard-branch-protection],
- [enable Branch Target Identification Mechanism and Return Address Signing by default for AArch64])
+ [enable Branch Target Identification Mechanism, Return Address Signing, and Guarded Control Stack by default for AArch64])
AS_HELP_STRING([--disable-standard-branch-protection],
- [disable Branch Target Identification Mechanism and Return Address Signing by default for AArch64])
+ [disable Branch Target Identification Mechanism, Return Address Signing, and Guarded Control Stack by default for AArch64])
],
[
case $enableval in
yes)
- tm_defines="${tm_defines} TARGET_ENABLE_BTI=1 TARGET_ENABLE_PAC_RET=1"
+ tm_defines="${tm_defines} TARGET_ENABLE_BTI=1 TARGET_ENABLE_PAC_RET=1 TARGET_ENABLE_GCS=1"
;;
no)
;;
@@ -814,7 +814,7 @@ Objective-C and Objective-C++ Dialects}.
-mpc-relative-literal-loads
-msign-return-address=@var{scope}
-mbranch-protection=@var{none}|@var{standard}|@var{pac-ret}[+@var{leaf}
-+@var{b-key}]|@var{bti}
++@var{b-key}]|@var{bti}|@var{gcs}
-mharden-sls=@var{opts}
-march=@var{name} -mcpu=@var{name} -mtune=@var{name}
-moverride=@var{string} -mverbose-cost-dump
@@ -21589,7 +21589,7 @@ default value is @samp{none}. This option has been deprecated by
-mbranch-protection.
@opindex mbranch-protection
-@item -mbranch-protection=@var{none}|@var{standard}|@var{pac-ret}[+@var{leaf}+@var{b-key}]|@var{bti}
+@item -mbranch-protection=@var{none}|@var{standard}|@var{pac-ret}[+@var{leaf}+@var{b-key}]|@var{bti}|@var{gcs}
Select the branch protection features to use.
@samp{none} is the default and turns off all types of branch protection.
@samp{standard} turns on all types of branch protection features. If a feature
@@ -21602,6 +21602,7 @@ argument @samp{leaf} can be used to extend the signing to include leaf
functions. The optional argument @samp{b-key} can be used to sign the functions
with the B-key instead of the A-key.
@samp{bti} turns on branch target identification mechanism.
+@samp{gcs} turns on guarded control stack compatible code generation.
@opindex mharden-sls
@item -mharden-sls=@var{opts}
From: Szabolcs Nagy <szabolcs.nagy@arm.com> This enables Guarded Control Stack (GCS) compatible code generation. The "standard" branch-protection type enables it, and the default depends on the compiler default. gcc/ChangeLog: * config/aarch64/aarch64-protos.h (aarch_gcs_enabled): Declare. * config/aarch64/aarch64.cc (aarch_gcs_enabled): Define. (aarch_handle_no_branch_protection): Handle gcs. (aarch_handle_standard_branch_protection): Handle gcs. (aarch_handle_gcs_protection): New. * config/aarch64/aarch64.opt: Add aarch_enable_gcs. * configure: Regenerate. * configure.ac: Handle gcs in --enable-standard-branch-protection. * doc/invoke.texi: Document -mbranch-protection=gcs. --- gcc/config/aarch64/aarch64-protos.h | 2 ++ gcc/config/aarch64/aarch64.cc | 24 ++++++++++++++++++++++++ gcc/config/aarch64/aarch64.opt | 3 +++ gcc/configure | 2 +- gcc/configure.ac | 6 +++--- gcc/doc/invoke.texi | 5 +++-- 6 files changed, 36 insertions(+), 6 deletions(-)