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bh=fI3LJFhTomzTneAL5U8S7jTPb2+5OnWzp4xbdEFxwOU=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=JRbD6go2sb4CeDqkd5ChrHFChtamluqZLOTxFVLPVivn/neGwcQwsY2UHZDlqnXWeOyLCXsbyuo0CbUspnoMpZuBmPlvy/d2WAwxkW79w902Nho8hPM+1oIr7JxJMQ2yZycMm3L1wq+unDfj90F2HH7xsEWtbO63q4NyAlOWVu4= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from localhost.localdomain (unknown [122.8.183.87]) by APP-05 (Coremail) with SMTP id zQCowAAnEGcZtSBn7MpyCw--.5692S3; Tue, 29 Oct 2024 18:12:53 +0800 (CST) From: shiyulong@iscas.ac.cn To: gcc-patches@gcc.gnu.org Cc: palmer@dabbelt.com, kito.cheng@sifive.com, wuwei2016@iscas.ac.cn, jiawei@iscas.ac.cn, shihua@iscas.ac.cn, chenyixuan@iscas.ac.cn, dje.gcc@gmail.com, mirimmad@outlook.com, pinskia@gmail.com, jeffreyalaw@gmail.com, craig.topper@sifive.com, yulong Subject: [PATCH 1/2] RISC-V:Add intrinsic support for the CMOs extensions Date: Tue, 29 Oct 2024 18:12:33 +0800 Message-Id: <20241029101234.985973-2-shiyulong@iscas.ac.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241029101234.985973-1-shiyulong@iscas.ac.cn> References: <20241029101234.985973-1-shiyulong@iscas.ac.cn> MIME-Version: 1.0 X-CM-TRANSID: zQCowAAnEGcZtSBn7MpyCw--.5692S3 X-Coremail-Antispam: 1UD129KBjvJXoWxXrykuF18KrWDuF1UKFW3ZFb_yoWrXw4fpF W5GrW3CF1rAF9xG3yfJr4xtw15Gr9a9F1Yqry3WryUAFW5J3yxtrnrtay7AFs8WF4Yyr12 9F4Dua4Yka1UA3DanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUQm14x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_Jr4l82xGYIkIc2 x26xkF7I0E14v26r4j6ryUM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2z4x0 Y4vE2Ix0cI8IcVAFwI0_JFI_Gr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1l84 ACjcxK6I8E87Iv67AKxVWxJr0_GcWl84ACjcxK6I8E87Iv6xkF7I0E14v26rxl6s0DM2AI xVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20x vE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xv r2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7M4IIrI8v6xkF7I0E8cxan2IY04 v7M4kE6xkIj40Ew7xC0wCY1x0262kKe7AKxVWUtVW8ZwCY02Avz4vE14v_Gw1l42xK82IY c2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s 026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1q6r43MIIYrxkI7VAKI48JMIIF 0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0x vE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv 6xkF7I0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjfU1tx6UUUUU X-Originating-IP: [122.8.183.87] X-CM-SenderInfo: 5vkl53porqwq5lvft2wodfhubq/ X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_DNSWL_LOW, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org From: yulong gcc/ChangeLog: * config.gcc: Add riscv_cmo.h. * config/riscv/riscv_cmo.h: New file. --- gcc/config.gcc | 2 +- gcc/config/riscv/riscv_cmo.h | 93 ++++++++++++++++++++++++++++++++++++ 2 files changed, 94 insertions(+), 1 deletion(-) create mode 100644 gcc/config/riscv/riscv_cmo.h diff --git a/gcc/config.gcc b/gcc/config.gcc index fd848228722..e2ed3b309cc 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -558,7 +558,7 @@ riscv*) extra_objs="${extra_objs} riscv-vector-builtins.o riscv-vector-builtins-shapes.o riscv-vector-builtins-bases.o" extra_objs="${extra_objs} thead.o riscv-target-attr.o" d_target_objs="riscv-d.o" - extra_headers="riscv_vector.h riscv_crypto.h riscv_bitmanip.h riscv_th_vector.h" + extra_headers="riscv_vector.h riscv_crypto.h riscv_bitmanip.h riscv_th_vector.h riscv_cmo.h" target_gtfiles="$target_gtfiles \$(srcdir)/config/riscv/riscv-vector-builtins.cc" target_gtfiles="$target_gtfiles \$(srcdir)/config/riscv/riscv-vector-builtins.h" ;; diff --git a/gcc/config/riscv/riscv_cmo.h b/gcc/config/riscv/riscv_cmo.h new file mode 100644 index 00000000000..95bf60da082 --- /dev/null +++ b/gcc/config/riscv/riscv_cmo.h @@ -0,0 +1,93 @@ +/* RISC-V CMO Extension intrinsics include file. + Copyright (C) 2024 Free Software Foundation, Inc. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + . */ + +#ifndef __RISCV_CMO_H +#define __RISCV_CMO_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined (__riscv_zicbom) + +extern __inline void +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_cmo_clean (void *addr) +{ + __builtin_riscv_zicbom_cbo_clean(addr); +} + +extern __inline void +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_cmo_flush (void *addr) +{ + __builtin_riscv_zicbom_cbo_flush(addr); +} + +extern __inline void +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_cmo_inval (void *addr) +{ + __builtin_riscv_zicbom_cbo_inval(addr); +} + +#endif // __riscv_zicbom + +#if defined (__riscv_zicbop) + +# define rnum 1 + +extern __inline void +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_cmo_prefetch (void *addr, const int vs1, const int vs2) +{ + __builtin_prefetch(addr,vs1,vs2); +} + +extern __inline int +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_cmo_prefetchi () +{ + return __builtin_riscv_zicbop_cbo_prefetchi(rnum); +} + +#endif // __riscv_zicbop + +#if defined (__riscv_zicboz) + +extern __inline void +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_cmo_zero (void *addr) +{ + __builtin_riscv_zicboz_cbo_zero(addr); +} + +#endif // __riscv_zicboz + +#if defined (__cplusplus) +} +#endif // __cplusplus +#endif // __RISCV_CMO_H \ No newline at end of file