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X-CSE-ConnectionGUID: JSCgUnGiStCs+Mtgwclx7w== X-CSE-MsgGUID: Z7Lhr4IIQpacuDDoPmJ/ww== X-IronPort-AV: E=McAfee;i="6700,10204,11202"; a="26076561" X-IronPort-AV: E=Sophos;i="6.10,247,1719903600"; d="scan'208";a="26076561" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Sep 2024 07:23:20 -0700 X-CSE-ConnectionGUID: Ulkli5vFSuOLRwvCSNr5QA== X-CSE-MsgGUID: UOry1esvQ3CP0zXIdANjGg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,247,1719903600"; d="scan'208";a="71431052" Received: from panli.sh.intel.com ([10.239.154.73]) by orviesa008.jf.intel.com with ESMTP; 21 Sep 2024 07:23:18 -0700 From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: richard.guenther@gmail.com, Tamar.Christina@arm.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH v1 1/2] Match: Support form 3 for vector signed integer .SAT_ADD Date: Sat, 21 Sep 2024 22:22:12 +0800 Message-ID: <20240921142212.1948700-1-pan2.li@intel.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org From: Pan Li This patch would like to support the form 3 of the vector signed integer .SAT_ADD. Aka below example: Form 3: #define DEF_VEC_SAT_S_ADD_FMT_3(T, UT, MIN, MAX) \ void __attribute__((noinline)) \ vec_sat_s_add_##T##_fmt_3 (T *out, T *op_1, T *op_2, unsigned limit) \ { \ unsigned i; \ for (i = 0; i < limit; i++) \ { \ T x = op_1[i]; \ T y = op_2[i]; \ T sum; \ bool overflow = __builtin_add_overflow (x, y, &sum); \ out[i] = overflow ? x < 0 ? MIN : MAX : sum; \ } \ } DEF_VEC_SAT_S_ADD_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX) Before this patch: 40 │ # ivtmp.7_34 = PHI <0(3), ivtmp.7_30(7)> 41 │ _26 = op_1_12(D) + ivtmp.7_34; 42 │ x_29 = MEM[(int8_t *)_26]; 43 │ _1 = op_2_14(D) + ivtmp.7_34; 44 │ y_24 = MEM[(int8_t *)_1]; 45 │ _9 = .ADD_OVERFLOW (y_24, x_29); 46 │ _7 = IMAGPART_EXPR <_9>; 47 │ if (_7 != 0) 48 │ goto ; [50.00%] 49 │ else 50 │ goto ; [50.00%] 51 │ ;; succ: 6 52 │ ;; 5 53 │ 54 │ ;; basic block 5, loop depth 1 55 │ ;; pred: 4 56 │ _42 = REALPART_EXPR <_9>; 57 │ _2 = out_17(D) + ivtmp.7_34; 58 │ MEM[(int8_t *)_2] = _42; 59 │ ivtmp.7_27 = ivtmp.7_34 + 1; 60 │ if (_13 != ivtmp.7_27) 61 │ goto ; [89.00%] 62 │ else 63 │ goto ; [11.00%] 64 │ ;; succ: 7 65 │ ;; 8 66 │ 67 │ ;; basic block 6, loop depth 1 68 │ ;; pred: 4 69 │ _38 = x_29 < 0; 70 │ _39 = (signed char) _38; 71 │ _40 = -_39; 72 │ _41 = _40 ^ 127; 73 │ _33 = out_17(D) + ivtmp.7_34; 74 │ MEM[(int8_t *)_33] = _41; 75 │ ivtmp.7_25 = ivtmp.7_34 + 1; 76 │ if (_13 != ivtmp.7_25) After this patch: 77 │ _94 = .SELECT_VL (ivtmp_92, POLY_INT_CST [16, 16]); 78 │ vect_x_13.9_81 = .MASK_LEN_LOAD (vectp_op_1.7_79, 8B, { -1, ... }, _94, 0); 79 │ vect_y_15.12_85 = .MASK_LEN_LOAD (vectp_op_2.10_83, 8B, { -1, ... }, _94, 0); 80 │ vect_patt_49.13_86 = .SAT_ADD (vect_x_13.9_81, vect_y_15.12_85); 81 │ .MASK_LEN_STORE (vectp_out.14_88, 8B, { -1, ... }, _94, 0, vect_patt_49.13_86); 82 │ vectp_op_1.7_80 = vectp_op_1.7_79 + _94; 83 │ vectp_op_2.10_84 = vectp_op_2.10_83 + _94; 84 │ vectp_out.14_89 = vectp_out.14_88 + _94; 85 │ ivtmp_93 = ivtmp_92 - _94; The below test suites are passed for this patch. * The rv64gcv fully regression test. * The x86 bootstrap test. * The x86 fully regression test. gcc/ChangeLog: * match.pd: Add optional nop_convert for signed SAT_ADD case 4. Signed-off-by: Pan Li --- gcc/match.pd | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/gcc/match.pd b/gcc/match.pd index 940292d0d49..c271a8e4c9d 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -3246,7 +3246,9 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) SAT_S_ADD = IMAGPART_EXPR (Z) != 0 ? (-(T)(X < 0) ^ MAX) : sum; */ (match (signed_integer_sat_add @0 @1) (cond^ (ne (imagpart (IFN_ADD_OVERFLOW:c@2 @0 @1)) integer_zerop) - (bit_xor:c (negate (convert (lt @0 integer_zerop))) max_value) + (bit_xor:c (nop_convert? + (negate (nop_convert? (convert (lt @0 integer_zerop))))) + max_value) (realpart @2)) (if (INTEGRAL_TYPE_P (type) && !TYPE_UNSIGNED (type) && types_match (type, @0, @1))))