diff mbox series

[pushed] testsuite: Fix ending of comment in test cases

Message ID 20240827105828.3963453-1-torbjorn.svensson@foss.st.com
State New
Headers show
Series [pushed] testsuite: Fix ending of comment in test cases | expand

Commit Message

Torbjörn SVENSSON Aug. 27, 2024, 10:58 a.m. UTC
Found a few more places that had similar issue with the termination of the comment, so fixed them all.

Pushed below patch as obvious (r15-3215).

--


gcc/testsuite/ChangeLog:

	* gcc.dg/pr108757-1.c: Fixed dg-comment.
	* gcc.dg/pr71071.c: Likewise.
	* gcc.dg/tree-ssa/noreturn-1.c: Likewise.
	* gcc.dg/tree-ssa/pr56727.c: Likewise.
	* gcc.target/arc/loop-2.cpp: Likewise.
	* gcc.target/arc/loop-3.c: Likewise.
	* gcc.target/arc/pr9001107555.c: Likewise.
	* gcc.target/arm/armv8_1m-fp16-move-1.c: Likewise.
	* gcc.target/arm/armv8_1m-fp32-move-1.c: Likewise.
	* gcc.target/arm/armv8_1m-fp64-move-1.c: Likewise.
	* gcc.target/i386/amxint8-asmatt-1.c: Likewise.
	* gcc.target/i386/amxint8-asmintel-1.c: Likewise.
	* gcc.target/i386/avx512bw-vpermt2w-1.c: Likewise.
	* gcc.target/i386/avx512vbmi-vpermt2b-1.c: Likewise.
	* gcc.target/i386/endbr_immediate.c: Likewise.
	* gcc.target/i386/pr96539.c: Likewise.
	* gcc.target/i386/sse2-pr98461-2.c: Likewise.
	* gcc.target/m68k/pr39726.c: Likewise.
	* gcc.target/m68k/pr52076-1.c: Likewise.
	* gcc.target/m68k/pr52076-2.c: Likewise.
	* gcc.target/nvptx/v2si-vec-set-extract.c: Likewise.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
---
 gcc/testsuite/gcc.dg/pr108757-1.c                     | 2 +-
 gcc/testsuite/gcc.dg/pr71071.c                        | 2 +-
 gcc/testsuite/gcc.dg/tree-ssa/noreturn-1.c            | 2 +-
 gcc/testsuite/gcc.dg/tree-ssa/pr56727.c               | 2 +-
 gcc/testsuite/gcc.target/arc/loop-2.cpp               | 2 +-
 gcc/testsuite/gcc.target/arc/loop-3.c                 | 2 +-
 gcc/testsuite/gcc.target/arc/pr9001107555.c           | 2 +-
 gcc/testsuite/gcc.target/arm/armv8_1m-fp16-move-1.c   | 2 +-
 gcc/testsuite/gcc.target/arm/armv8_1m-fp32-move-1.c   | 2 +-
 gcc/testsuite/gcc.target/arm/armv8_1m-fp64-move-1.c   | 2 +-
 gcc/testsuite/gcc.target/i386/amxint8-asmatt-1.c      | 2 +-
 gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c    | 2 +-
 gcc/testsuite/gcc.target/i386/avx512bw-vpermt2w-1.c   | 2 +-
 gcc/testsuite/gcc.target/i386/avx512vbmi-vpermt2b-1.c | 2 +-
 gcc/testsuite/gcc.target/i386/endbr_immediate.c       | 2 +-
 gcc/testsuite/gcc.target/i386/pr96539.c               | 2 +-
 gcc/testsuite/gcc.target/i386/sse2-pr98461-2.c        | 2 +-
 gcc/testsuite/gcc.target/m68k/pr39726.c               | 2 +-
 gcc/testsuite/gcc.target/m68k/pr52076-1.c             | 2 +-
 gcc/testsuite/gcc.target/m68k/pr52076-2.c             | 2 +-
 gcc/testsuite/gcc.target/nvptx/v2si-vec-set-extract.c | 2 +-
 21 files changed, 21 insertions(+), 21 deletions(-)
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.dg/pr108757-1.c b/gcc/testsuite/gcc.dg/pr108757-1.c
index 7908f4bdcb8..712dc4c30e9 100644
--- a/gcc/testsuite/gcc.dg/pr108757-1.c
+++ b/gcc/testsuite/gcc.dg/pr108757-1.c
@@ -13,6 +13,6 @@  typedef int INT;
 #define IMIN INT_MIN
 #include "pr108757.h"
 
-/* { dg-final { scan-tree-dump-not " = x_\[0-9\]+\\(D\\) \\+ " "optimized" } } *
+/* { dg-final { scan-tree-dump-not " = x_\[0-9\]+\\(D\\) \\+ " "optimized" } } */
 /* { dg-final { scan-tree-dump-not " = x_\[0-9\]+\\(D\\) \\- " "optimized" } } */
 /* { dg-final { scan-tree-dump-not " = b_\[0-9\]+ \\+ " "optimized" } } */
diff --git a/gcc/testsuite/gcc.dg/pr71071.c b/gcc/testsuite/gcc.dg/pr71071.c
index 582f1f15a43..3e83dc9f1b7 100644
--- a/gcc/testsuite/gcc.dg/pr71071.c
+++ b/gcc/testsuite/gcc.dg/pr71071.c
@@ -1,5 +1,5 @@ 
 /* PR bootstrap/71071 */
-/* { dg-do compile } *
+/* { dg-do compile } */
 /* { dg-options "-O2" } */
 
 struct S { unsigned b : 1; } a;
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/noreturn-1.c b/gcc/testsuite/gcc.dg/tree-ssa/noreturn-1.c
index ae7ee42fabc..35f3d980217 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/noreturn-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/noreturn-1.c
@@ -1,4 +1,4 @@ 
-/* { dg-do compile } *
+/* { dg-do compile } */
 /* { dg-options "-O2 -fdump-tree-ssa -std=gnu11" } */
 /* { dg-final { scan-tree-dump-times "__builtin_unreachable" 4 "ssa" } } */
 
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr56727.c b/gcc/testsuite/gcc.dg/tree-ssa/pr56727.c
index 3080ce183b8..da2c9ab31f2 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/pr56727.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr56727.c
@@ -1,4 +1,4 @@ 
-/* { dg-do compile { target fpic } } *
+/* { dg-do compile { target fpic } } */
 /* { dg-require-alias "" } */
 /* { dg-options "-O2 -fPIC -fdump-tree-optimized" } */
 void do_not_optimize(int b)
diff --git a/gcc/testsuite/gcc.target/arc/loop-2.cpp b/gcc/testsuite/gcc.target/arc/loop-2.cpp
index d1dc917ba47..9cfb3274e21 100644
--- a/gcc/testsuite/gcc.target/arc/loop-2.cpp
+++ b/gcc/testsuite/gcc.target/arc/loop-2.cpp
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O2" } *
+/* { dg-options "-O2" } */
 /* { dg-do assemble } */
 
 /* This file fails to assemble if we forgot to increase the number of
diff --git a/gcc/testsuite/gcc.target/arc/loop-3.c b/gcc/testsuite/gcc.target/arc/loop-3.c
index ae0d6110f18..d97c6f76b09 100644
--- a/gcc/testsuite/gcc.target/arc/loop-3.c
+++ b/gcc/testsuite/gcc.target/arc/loop-3.c
@@ -1,6 +1,6 @@ 
 /* { dg-do assemble } */
 /* { dg-do compile } */
-/* { dg-options "-O2 -mno-sdata" } *
+/* { dg-options "-O2 -mno-sdata" } */
 
 /* This example will fail to assemble if the last instruction is a
    branch with delay slot.  */
diff --git a/gcc/testsuite/gcc.target/arc/pr9001107555.c b/gcc/testsuite/gcc.target/arc/pr9001107555.c
index 420fa835fa4..1598653e788 100644
--- a/gcc/testsuite/gcc.target/arc/pr9001107555.c
+++ b/gcc/testsuite/gcc.target/arc/pr9001107555.c
@@ -1,4 +1,4 @@ 
-/* { dg-do assemble } *
+/* { dg-do assemble } */
 /* { dg-skip-if "" { ! { clmcpu } } } */
 /* { dg-options "-O3 -funroll-loops -mno-sdata -mcpu=arc700" } */
 
diff --git a/gcc/testsuite/gcc.target/arm/armv8_1m-fp16-move-1.c b/gcc/testsuite/gcc.target/arm/armv8_1m-fp16-move-1.c
index f5ab6e719f4..e6ed76870b4 100644
--- a/gcc/testsuite/gcc.target/arm/armv8_1m-fp16-move-1.c
+++ b/gcc/testsuite/gcc.target/arm/armv8_1m-fp16-move-1.c
@@ -2,7 +2,7 @@ 
 /* { dg-options "-O -mfp16-format=ieee" } */
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
-/* { dg-additional-options "-mfloat-abi=hard" } *
+/* { dg-additional-options "-mfloat-abi=hard" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 /*
diff --git a/gcc/testsuite/gcc.target/arm/armv8_1m-fp32-move-1.c b/gcc/testsuite/gcc.target/arm/armv8_1m-fp32-move-1.c
index 2f62e839545..d161cfebd92 100644
--- a/gcc/testsuite/gcc.target/arm/armv8_1m-fp32-move-1.c
+++ b/gcc/testsuite/gcc.target/arm/armv8_1m-fp32-move-1.c
@@ -2,7 +2,7 @@ 
 /* { dg-options "-O" } */
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
-/* { dg-additional-options "-mfloat-abi=hard" } *
+/* { dg-additional-options "-mfloat-abi=hard" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 /*
diff --git a/gcc/testsuite/gcc.target/arm/armv8_1m-fp64-move-1.c b/gcc/testsuite/gcc.target/arm/armv8_1m-fp64-move-1.c
index d236f0826c3..39e8c406324 100644
--- a/gcc/testsuite/gcc.target/arm/armv8_1m-fp64-move-1.c
+++ b/gcc/testsuite/gcc.target/arm/armv8_1m-fp64-move-1.c
@@ -2,7 +2,7 @@ 
 /* { dg-options "-O" } */
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
-/* { dg-additional-options "-mfloat-abi=hard" } *
+/* { dg-additional-options "-mfloat-abi=hard" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 /*
diff --git a/gcc/testsuite/gcc.target/i386/amxint8-asmatt-1.c b/gcc/testsuite/gcc.target/i386/amxint8-asmatt-1.c
index 1842c234be8..c785c54c67f 100644
--- a/gcc/testsuite/gcc.target/i386/amxint8-asmatt-1.c
+++ b/gcc/testsuite/gcc.target/i386/amxint8-asmatt-1.c
@@ -1,7 +1,7 @@ 
 /* { dg-do compile { target { ! ia32 } } } */
 /* { dg-options "-O2 -mamx-int8" } */
 /* { dg-final { scan-assembler "tdpbssd\[ \\t]+\[^\n\]*%tmm3+\[^\n\]*%tmm2+\[^\n\]*%tmm1"  } } */
-/* { dg-final { scan-assembler "tdpbsud\[ \\t]+\[^\n\]*%tmm3+\[^\n\]*%tmm2+\[^\n\]*%tmm1"  } } *
+/* { dg-final { scan-assembler "tdpbsud\[ \\t]+\[^\n\]*%tmm3+\[^\n\]*%tmm2+\[^\n\]*%tmm1"  } } */
 /* { dg-final { scan-assembler "tdpbusd\[ \\t]+\[^\n\]*%tmm3+\[^\n\]*%tmm2+\[^\n\]*%tmm1"  } } */
 /* { dg-final { scan-assembler "tdpbuud\[ \\t]+\[^\n\]*%tmm3+\[^\n\]*%tmm2+\[^\n\]*%tmm1"  } } */
 #include <immintrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c b/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c
index f8c376ae6c4..abc98745a76 100644
--- a/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c
+++ b/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c
@@ -2,7 +2,7 @@ 
 /* { dg-require-effective-target masm_intel } */
 /* { dg-options "-O2 -mamx-int8 -masm=intel" } */
 /* { dg-final { scan-assembler "tdpbssd\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
-/* { dg-final { scan-assembler "tdpbsud\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } *
+/* { dg-final { scan-assembler "tdpbsud\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
 /* { dg-final { scan-assembler "tdpbusd\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
 /* { dg-final { scan-assembler "tdpbuud\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
 #include <immintrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpermt2w-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-vpermt2w-1.c
index a734cb600ce..94c95f8c326 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bw-vpermt2w-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpermt2w-1.c
@@ -1,7 +1,7 @@ 
 /* { dg-do compile } */
 /* { dg-options "-mavx512bw -mavx512vl -O2" } */
 /* { dg-final { scan-assembler-times "vperm\[ti]2w\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
-/* { dg-final { scan-assembler-times "vperm\[ti]2w\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } *
+/* { dg-final { scan-assembler-times "vperm\[ti]2w\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vperm\[ti]2w\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)"  1 } } */
 /* { dg-final { scan-assembler-times "vperm\[ti]2w\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
 /* { dg-final { scan-assembler-times "vperm\[ti]2w\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vbmi-vpermt2b-1.c b/gcc/testsuite/gcc.target/i386/avx512vbmi-vpermt2b-1.c
index 24a0b9e3fce..24640d5be3a 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vbmi-vpermt2b-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vbmi-vpermt2b-1.c
@@ -1,7 +1,7 @@ 
 /* { dg-do compile } */
 /* { dg-options "-mavx512vbmi -mavx512vl -O2" } */
 /* { dg-final { scan-assembler-times "vperm\[ti]2b\[ \\t\]+\[^\n\]*%zmm\[0-9\]+" 3 } } */
-/* { dg-final { scan-assembler-times "vperm\[ti]2b\[ \\t\]+\[^\n\]*%ymm\[0-9\]+" 3 } } *
+/* { dg-final { scan-assembler-times "vperm\[ti]2b\[ \\t\]+\[^\n\]*%ymm\[0-9\]+" 3 } } */
 /* { dg-final { scan-assembler-times "vperm\[ti]2b\[ \\t\]+\[^\n\]*%xmm\[0-9\]+" 3 } } */
 /* { dg-final { scan-assembler-times "vperm\[ti]2b\[ \\t\]+\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\[^\{\]" 1 } } */
 /* { dg-final { scan-assembler-times "vperm\[ti]2b\[ \\t\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\[^\{\]" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/endbr_immediate.c b/gcc/testsuite/gcc.target/i386/endbr_immediate.c
index 3015512aa0e..0aa97a9a5a1 100644
--- a/gcc/testsuite/gcc.target/i386/endbr_immediate.c
+++ b/gcc/testsuite/gcc.target/i386/endbr_immediate.c
@@ -2,7 +2,7 @@ 
 /* { dg-do compile } */
 /* { dg-options "-fcf-protection -O2" } */
 /* { dg-final { scan-assembler-not "$-81915917" { target { ia32 } } } } */
-/* { dg-final { scan-assembler-not "$-98693133" { target { ! ia32 } } } } *
+/* { dg-final { scan-assembler-not "$-98693133" { target { ! ia32 } } } } */
 /* { dg-final { scan-assembler-not "$-423883778574778368" { target { ! ia32 } } } } */
 /* { dg-final { scan-assembler "\[ \t\]*-81915917" { target { ia32 } } } } */
 /* { dg-final { scan-assembler "\[ \t\]*-98693133" { target { ! ia32 } } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr96539.c b/gcc/testsuite/gcc.target/i386/pr96539.c
index 696929be0af..cafcfda19b9 100644
--- a/gcc/testsuite/gcc.target/i386/pr96539.c
+++ b/gcc/testsuite/gcc.target/i386/pr96539.c
@@ -1,5 +1,5 @@ 
 /* PR rtl-optimization/96539 */
-/* { dg-do compile } *
+/* { dg-do compile } */
 /* { dg-options "-Os" } */
 /* The need to restore the PIC register prevents PLT tail-calls on ia32,
    so S has to be copied to call baz.  */
diff --git a/gcc/testsuite/gcc.target/i386/sse2-pr98461-2.c b/gcc/testsuite/gcc.target/i386/sse2-pr98461-2.c
index 330272c69bc..6b252323669 100644
--- a/gcc/testsuite/gcc.target/i386/sse2-pr98461-2.c
+++ b/gcc/testsuite/gcc.target/i386/sse2-pr98461-2.c
@@ -3,7 +3,7 @@ 
 /* { dg-options "-O2 -msse2 -mno-sse3 -masm=att" } */
 /* { dg-final { scan-assembler-times "\tpmovmskb\t" 3 } } */
 /* { dg-final { scan-assembler-not "\tmovzwl" } } */
-/* { dg-final { scan-assembler-times "\tnotl" 1 } } *
+/* { dg-final { scan-assembler-times "\tnotl" 1 } } */
 /* { dg-final { scan-assembler-times "\txorl" 1 } } */
 
 #include <immintrin.h>
diff --git a/gcc/testsuite/gcc.target/m68k/pr39726.c b/gcc/testsuite/gcc.target/m68k/pr39726.c
index 94d41ba2159..e79f1116706 100644
--- a/gcc/testsuite/gcc.target/m68k/pr39726.c
+++ b/gcc/testsuite/gcc.target/m68k/pr39726.c
@@ -1,4 +1,4 @@ 
-/* { dg-do assemble } /*
+/* { dg-do assemble } */
 /* { dg-options "-O2 -fomit-frame-pointer" } */
 /* { dg-final { object-size text <= 228 } } */
 
diff --git a/gcc/testsuite/gcc.target/m68k/pr52076-1.c b/gcc/testsuite/gcc.target/m68k/pr52076-1.c
index 86df0dcae43..dd3614dfc6a 100644
--- a/gcc/testsuite/gcc.target/m68k/pr52076-1.c
+++ b/gcc/testsuite/gcc.target/m68k/pr52076-1.c
@@ -1,4 +1,4 @@ 
-/* { dg-do assemble } /*
+/* { dg-do assemble } */
 /* { dg-options "-Os -fomit-frame-pointer -m68040" } */
 /* { dg-final { object-size text <= 72 } } */
 
diff --git a/gcc/testsuite/gcc.target/m68k/pr52076-2.c b/gcc/testsuite/gcc.target/m68k/pr52076-2.c
index 30c6991839c..ddfec38db45 100644
--- a/gcc/testsuite/gcc.target/m68k/pr52076-2.c
+++ b/gcc/testsuite/gcc.target/m68k/pr52076-2.c
@@ -1,4 +1,4 @@ 
-/* { dg-do assemble } /*
+/* { dg-do assemble } */
 /* { dg-options "-Os -fomit-frame-pointer -m68040" } */
 /* { dg-final { object-size text <= 30 } } */
 
diff --git a/gcc/testsuite/gcc.target/nvptx/v2si-vec-set-extract.c b/gcc/testsuite/gcc.target/nvptx/v2si-vec-set-extract.c
index a0709e50718..ab213411e61 100644
--- a/gcc/testsuite/gcc.target/nvptx/v2si-vec-set-extract.c
+++ b/gcc/testsuite/gcc.target/nvptx/v2si-vec-set-extract.c
@@ -19,7 +19,7 @@  foo2 (unsigned int a, unsigned int b)
 }
 
 /* { dg-final { scan-assembler "mov.u32.*\\.x;" } } */
-/* { dg-final { scan-assembler "mov.u32.*\\.y;" } } *
+/* { dg-final { scan-assembler "mov.u32.*\\.y;" } } */
 
 /* { dg-final { scan-assembler "mov.u32\[\t\]%r\[0-9\]\[0-9\]*\\.x, " } } */
 /* { dg-final { scan-assembler "mov.u32\[\t\]%r\[0-9\]\[0-9\]*\\.y, " } } */