diff mbox series

tree-optimization/116406 - ICE with int<->float punning prevention

Message ID 20240821133707.A1FED386F478@sourceware.org
State New
Headers show
Series tree-optimization/116406 - ICE with int<->float punning prevention | expand

Commit Message

Richard Biener Aug. 21, 2024, 1:36 p.m. UTC 
The following does away with the idea to use non-symmetrical
testing of mode_can_transfer_bits in hash-table equality testing.
It isn't feasible to always control query order to maintain
consistency.

Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.

	PR tree-optimization/116406
	* tree-ssa-sccvn.cc (vn_reference_eq): Never equate
	float and int when the float mode cannot transfer bits.
	Do not try to anticipate which is the mode we actually load
	from.

	* gcc.dg/tree-ssa/pr116406.c: New testcase.
	* gcc.dg/tree-ssa/ssa-pre-30.c: On x86 dd -msse -mfpmath=sse.
---
 gcc/testsuite/gcc.dg/tree-ssa/pr116406.c   | 21 +++++++++++++++++++++
 gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-30.c |  1 +
 gcc/tree-ssa-sccvn.cc                      |  3 ++-
 3 files changed, 24 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr116406.c
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr116406.c b/gcc/testsuite/gcc.dg/tree-ssa/pr116406.c
new file mode 100644
index 00000000000..6643c49218f
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr116406.c
@@ -0,0 +1,21 @@ 
+/* { dg-do compile } */
+/* { dg-options "-Os -finstrument-functions-once" } */
+/* { dg-additional-options "-mfpmath=387" { target { x86_64-*-* i?86-*-* } } } */
+
+typedef union {
+  float f32;
+  double f64;
+  long i64;
+} U;
+
+_Bool
+foo (int c, U u)
+{
+  switch (c)
+    {
+    case 1:
+      return u.f32 - u.f64;
+    case 0:
+      return u.i64;
+    }
+}
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-30.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-30.c
index cf9317372d6..29dc1812338 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-30.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-30.c
@@ -1,6 +1,7 @@ 
 /* { dg-do compile } */
 /* { dg-require-effective-target int32 } */
 /* { dg-options "-O2 -fdump-tree-pre-details" } */
+/* { dg-additional-options "-msse -mfpmath=sse" { target { x86_64-*-* i?86-*-* } } } */
 
 int f;
 int g;
diff --git a/gcc/tree-ssa-sccvn.cc b/gcc/tree-ssa-sccvn.cc
index 4370d09d9d8..abf7d38d15c 100644
--- a/gcc/tree-ssa-sccvn.cc
+++ b/gcc/tree-ssa-sccvn.cc
@@ -838,7 +838,8 @@  vn_reference_eq (const_vn_reference_t const vr1, const_vn_reference_t const vr2)
 	return false;
     }
   else if (TYPE_MODE (vr1->type) != TYPE_MODE (vr2->type)
-	   && !mode_can_transfer_bits (TYPE_MODE (vr1->type)))
+	   && (!mode_can_transfer_bits (TYPE_MODE (vr1->type))
+	       || !mode_can_transfer_bits (TYPE_MODE (vr2->type))))
     return false;
 
   i = 0;