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Fri, 16 Aug 2024 12:15:00 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id C369A4002D; Fri, 16 Aug 2024 12:14:32 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id C30F523A4D8; Fri, 16 Aug 2024 12:14:12 +0200 (CEST) Received: from jkgcxl0004.jkg.st.com (10.74.22.255) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Fri, 16 Aug 2024 12:14:12 +0200 From: =?utf-8?q?Torbj=C3=B6rn_SVENSSON?= To: CC: , , , , =?utf-8?q?Torbj=C3=B6rn_S?= =?utf-8?q?VENSSON?= Subject: [PATCH] testsuite: Add -fwrapv to signbit-5.c Date: Fri, 16 Aug 2024 12:12:42 +0200 Message-ID: <20240816101241.2973252-1-torbjorn.svensson@foss.st.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.74.22.255] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-08-16_02,2024-08-15_01,2024-05-17_01 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Ok for trunk and releases/gcc-14? Verified this on x86_64 and arm-none-eabi. Don't know if the other "truth type" dg-lines can be removed as well. --- On Cortex-M55 with MVE, the test case fails due to -INT_MAX being undefined. Adding -fwrapv solves the issues. Regtested on x86_64-pc-linux and arm-none-eabi for Cortex-M0/M3/M4/M7/M33/M55/M85/A7. gcc/testsuite/ChangeLog: * gcc.dg/signbit-5.c: Add -fwrapv and remove x86 exception. Signed-off-by: Torbjörn SVENSSON Co-authored-by: Yvan ROUX --- gcc/testsuite/gcc.dg/signbit-5.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/gcc/testsuite/gcc.dg/signbit-5.c b/gcc/testsuite/gcc.dg/signbit-5.c index 1e1b237a0e0..2bca640f930 100644 --- a/gcc/testsuite/gcc.dg/signbit-5.c +++ b/gcc/testsuite/gcc.dg/signbit-5.c @@ -1,8 +1,7 @@ /* { dg-do run } */ -/* { dg-options "-O3" } */ +/* { dg-options "-O3 -fwrapv" } */ /* This test does not work when the truth type does not match vector type. */ -/* { dg-additional-options "-mno-avx512f" { target { i?86-*-* x86_64-*-* } } } */ /* { dg-additional-options "-march=armv8-a" { target aarch64_sve } } */ /* { dg-xfail-run-if "truth type does not match vector type" { amdgcn-*-* } } */ /* { dg-xfail-run-if "truth type does not match vector type" { riscv_v } } */