diff --git a/gcc/config/i386/avx10_2roundingintrin.h b/gcc/config/i386/avx10_2roundingintrin.h
index 09285c1ffcd..3e5e9f3ba0e 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -348,6 +348,144 @@ _mm256_maskz_cvt_roundpd_ps (__mmask8 __U, __m256d __A, const int __R)
 							 (__mmask8) __U,
 							 __R);
 }
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cvt_roundpd_epi32 (__m256d __A, const int __R)
+{
+  return
+    (__m128i) __builtin_ia32_cvtpd2dq256_mask_round ((__v4df) __A,
+						     (__v4si)
+						     _mm_undefined_si128 (),
+						     (__mmask8) -1,
+						     __R);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cvt_roundpd_epi32 (__m128i __W, __mmask8 __U, __m256d __A,
+			       const int __R)
+{
+  return (__m128i) __builtin_ia32_cvtpd2dq256_mask_round ((__v4df) __A,
+							  (__v4si) __W,
+							  (__mmask8) __U,
+							  __R);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_cvt_roundpd_epi32 (__mmask8 __U, __m256d __A, const int __R)
+{
+  return (__m128i) __builtin_ia32_cvtpd2dq256_mask_round ((__v4df) __A,
+							  (__v4si)
+							  _mm_setzero_si128 (),
+							  (__mmask8) __U,
+							  __R);
+}
+
+extern __inline __m256i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cvt_roundpd_epi64 (__m256d __A, const int __R)
+{
+  return
+    (__m256i) __builtin_ia32_cvtpd2qq256_mask_round ((__v4df) __A,
+						     (__v4di)
+						     _mm256_setzero_si256 (),
+						     (__mmask8) -1,
+						     __R);
+}
+
+extern __inline __m256i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cvt_roundpd_epi64 (__m256i __W, __mmask8 __U, __m256d __A,
+			       const int __R)
+{
+  return (__m256i) __builtin_ia32_cvtpd2qq256_mask_round ((__v4df) __A,
+							  (__v4di) __W,
+							  (__mmask8) __U,
+							  __R);
+}
+
+extern __inline __m256i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_cvt_roundpd_epi64 (__mmask8 __U, __m256d __A, const int __R)
+{
+  return
+    (__m256i) __builtin_ia32_cvtpd2qq256_mask_round ((__v4df) __A,
+						     (__v4di)
+						     _mm256_setzero_si256 (),
+						     (__mmask8) __U,
+						     __R);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cvt_roundpd_epu32 (__m256d __A, const int __R)
+{
+  return
+    (__m128i) __builtin_ia32_cvtpd2udq256_mask_round ((__v4df) __A,
+						      (__v4si)
+						      _mm_undefined_si128 (),
+						      (__mmask8) -1,
+						      __R);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cvt_roundpd_epu32 (__m128i __W, __mmask8 __U, __m256d __A,
+			       const int __R)
+{
+  return (__m128i) __builtin_ia32_cvtpd2udq256_mask_round ((__v4df) __A,
+							   (__v4si) __W,
+							   (__mmask8) __U,
+							   __R);
+}
+
+extern __inline __m128i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_cvt_roundpd_epu32 (__mmask8 __U, __m256d __A, const int __R)
+{
+  return (__m128i) __builtin_ia32_cvtpd2udq256_mask_round ((__v4df) __A,
+							   (__v4si)
+							   _mm_setzero_si128 (),
+							   (__mmask8) __U,
+							   __R);
+}
+
+extern __inline __m256i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cvt_roundpd_epu64 (__m256d __A, const int __R)
+{
+  return
+    (__m256i) __builtin_ia32_cvtpd2uqq256_mask_round ((__v4df) __A,
+						      (__v4di)
+						      _mm256_setzero_si256 (),
+						      (__mmask8) -1,
+						      __R);
+}
+
+extern __inline __m256i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cvt_roundpd_epu64 (__m256i __W, __mmask8 __U, __m256d __A,
+			       const int __R)
+{
+  return (__m256i) __builtin_ia32_cvtpd2uqq256_mask_round ((__v4df) __A,
+							   (__v4di) __W,
+							   (__mmask8) __U,
+							   __R);
+}
+
+extern __inline __m256i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_cvt_roundpd_epu64 (__mmask8 __U, __m256d __A, const int __R)
+{
+  return
+    (__m256i) __builtin_ia32_cvtpd2uqq256_mask_round ((__v4df) __A,
+						      (__v4di)
+						      _mm256_setzero_si256 (),
+						      (__mmask8) __U,
+						      __R);
+}
 #else
 #define _mm256_add_round_pd(A, B, R) \
   ((__m256d) __builtin_ia32_addpd256_mask_round ((__v4df) (A), \
@@ -537,6 +675,86 @@ _mm256_maskz_cvt_roundpd_ps (__mmask8 __U, __m256d __A, const int __R)
 						   (_mm_setzero_ps ()), \
 						   (__mmask8) (U), \
 						   (R)))
+
+#define _mm256_cvt_roundpd_epi32(A, R) \
+  ((__m128i) __builtin_ia32_cvtpd2dq256_mask_round ((__v4df) (A), \
+						    (__v4si) \
+						    (_mm_undefined_si128 ()), \
+						    (__mmask8) (-1), \
+						    (R)))
+
+#define _mm256_mask_cvt_roundpd_epi32(W, U, A, R) \
+  ((__m128i) __builtin_ia32_cvtpd2dq256_mask_round ((__v4df) (A), \
+						    (__v4si) (W), \
+						    (__mmask8) (U), \
+						    (R)))
+
+#define _mm256_maskz_cvt_roundpd_epi32(U, A, R)\
+  ((__m128i) __builtin_ia32_cvtpd2dq256_mask_round ((__v4df) (A), \
+						    (__v4si) \
+						    (_mm_setzero_si128 ()), \
+						    (__mmask8) (U), \
+						    (R)))
+
+#define _mm256_cvt_roundpd_epi64(A, R) \
+  ((__m256i) __builtin_ia32_cvtpd2qq256_mask_round ((__v4df) (A), \
+						    (__v4di) \
+						    (_mm256_setzero_si256 ()), \
+						    (__mmask8) (-1), \
+						    (R)))
+
+#define _mm256_mask_cvt_roundpd_epi64(W, U, A, R) \
+  ((__m256i) __builtin_ia32_cvtpd2qq256_mask_round ((__v4df) (A), \
+						    (__v4di) (W), \
+						    (__mmask8) (U), \
+						    (R)))
+
+#define _mm256_maskz_cvt_roundpd_epi64(U, A, R) \
+  ((__m256i) __builtin_ia32_cvtpd2qq256_mask_round ((__v4df) (A), \
+						    (__v4di) \
+						    (_mm256_setzero_si256 ()), \
+						    (__mmask8) (U), \
+						    (R)))
+
+#define _mm256_cvt_roundpd_epu32(A, R) \
+  ((__m128i) __builtin_ia32_cvtpd2udq256_mask_round ((__v4df) (A), \
+						     (__v4si) \
+						     (_mm_undefined_si128 ()), \
+						     (__mmask8) (-1),  \
+						     (R)))
+
+#define _mm256_mask_cvt_roundpd_epu32(W, U, A, R) \
+  ((__m128i) __builtin_ia32_cvtpd2udq256_mask_round ((__v4df) (A), \
+						     (__v4si) (W), \
+						     (__mmask8) (U), \
+						     (R)))
+
+#define _mm256_maskz_cvt_roundpd_epu32(U, A, R) \
+  ((__m128i) __builtin_ia32_cvtpd2udq256_mask_round ((__v4df) (A), \
+						     (__v4si) \
+						     (_mm_setzero_si128 ()), \
+						     (__mmask8) (U), \
+						     (R)))
+
+#define _mm256_cvt_roundpd_epu64(A, R) \
+  ((__m256i) __builtin_ia32_cvtpd2uqq256_mask_round ((__v4df) (A), \
+						     (__v4di) \
+						     (_mm256_setzero_si256 ()),\
+						     (__mmask8) (-1), \
+						     (R)))
+
+#define _mm256_mask_cvt_roundpd_epu64(W, U, A, R) \
+  ((__m256i) __builtin_ia32_cvtpd2uqq256_mask_round ((__v4df) (A), \
+						     (__v4di) (W), \
+						     (__mmask8) (U), \
+						     (R)))
+
+#define _mm256_maskz_cvt_roundpd_epu64(U, A, R) \
+  ((__m256i) __builtin_ia32_cvtpd2uqq256_mask_round ((__v4df) (A), \
+						     (__v4di) \
+						     (_mm256_setzero_si256 ()),\
+						     (__mmask8) (U), \
+						     (R)))
 #endif
 
 #ifdef __DISABLE_AVX10_2_256__
diff --git a/gcc/config/i386/i386-builtin-types.def b/gcc/config/i386/i386-builtin-types.def
index ec788841f8d..bbf2ccd2c42 100644
--- a/gcc/config/i386/i386-builtin-types.def
+++ b/gcc/config/i386/i386-builtin-types.def
@@ -1425,3 +1425,5 @@ DEF_FUNCTION_TYPE (V8HF, V8SI, V8HF, UQI, INT)
 DEF_FUNCTION_TYPE (V8SF, V8SI, V8SF, UQI, INT)
 DEF_FUNCTION_TYPE (V8HF, V4DF, V8HF, UQI, INT)
 DEF_FUNCTION_TYPE (V4SF, V4DF, V4SF, UQI, INT)
+DEF_FUNCTION_TYPE (V4SI, V4DF, V4SI, UQI, INT)
+DEF_FUNCTION_TYPE (V4DI, V4DF, V4DI, UQI, INT)
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index 38920bb2e26..c147d4c6450 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -3329,6 +3329,10 @@ BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512fp16_vcvtdq2ph_v8si_mask_
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_floatv8siv8sf2_mask_round, "__builtin_ia32_cvtdq2ps256_mask_round", IX86_BUILTIN_VCVTDQ2PS256_MASK_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8SI_V8SF_UQI_INT)
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512fp16_vcvtpd2ph_v4df_mask_round, "__builtin_ia32_vcvtpd2ph256_mask_round", IX86_BUILTIN_VCVTPD2PH256_MASK_ROUND, UNKNOWN, (int) V8HF_FTYPE_V4DF_V8HF_UQI_INT)
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx_cvtpd2ps256_mask_round, "__builtin_ia32_cvtpd2ps256_mask_round", IX86_BUILTIN_CVTPD2PS256_MASK_ROUND, UNKNOWN, (int) V4SF_FTYPE_V4DF_V4SF_UQI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx_cvtpd2dq256_mask_round, "__builtin_ia32_cvtpd2dq256_mask_round", IX86_BUILTIN_CVTPD2DQ256_MASK_ROUND, UNKNOWN, (int) V4SI_FTYPE_V4DF_V4SI_UQI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_fix_notruncv4dfv4di2_mask_round, "__builtin_ia32_cvtpd2qq256_mask_round", IX86_BUILTIN_CVTPD2QQ256_MASK_ROUND, UNKNOWN, (int) V4DI_FTYPE_V4DF_V4DI_UQI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_fixuns_notruncv4dfv4si2_mask_round, "__builtin_ia32_cvtpd2udq256_mask_round", IX86_BUILTIN_CVTPD2UDQ256_MASK_ROUND, UNKNOWN, (int) V4SI_FTYPE_V4DF_V4SI_UQI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_fixuns_notruncv4dfv4di2_mask_round, "__builtin_ia32_cvtpd2uqq256_mask_round", IX86_BUILTIN_CVTPD2UQQ256_MASK_ROUND, UNKNOWN, (int) V4DI_FTYPE_V4DF_V4DI_UQI_INT)
 
 BDESC_END (ROUND_ARGS, MULTI_ARG)
 
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index b6fc873a0b7..fd255d881a7 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -12465,7 +12465,9 @@ ix86_expand_round_builtin (const struct builtin_description *d,
     case V8DF_FTYPE_V8SF_V8DF_QI_INT:
     case V16SF_FTYPE_V16HI_V16SF_HI_INT:
     case V8SF_FTYPE_V8SI_V8SF_UQI_INT:
+    case V4DI_FTYPE_V4DF_V4DI_UQI_INT:
     case V2DF_FTYPE_V2DF_V2DF_V2DF_INT:
+    case V4SI_FTYPE_V4DF_V4SI_UQI_INT:
     case V4SF_FTYPE_V4DF_V4SF_UQI_INT:
     case V4SF_FTYPE_V4SF_V4SF_V4SF_INT:
     case V8HF_FTYPE_V8DI_V8HF_UQI_INT:
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 210f6988aaf..ea722ada9f3 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -9141,12 +9141,13 @@
    (set_attr "prefix" "evex")
    (set_attr "mode" "OI")])
 
-(define_insn "avx_cvtpd2dq256<mask_name>"
+(define_insn "avx_cvtpd2dq256<mask_name><round_name>"
   [(set (match_operand:V4SI 0 "register_operand" "=v")
-	(unspec:V4SI [(match_operand:V4DF 1 "nonimmediate_operand" "vm")]
+	(unspec:V4SI [(match_operand:V4DF 1 "<round_nimm_predicate>" "<round_constraint>")]
 		     UNSPEC_FIX_NOTRUNC))]
-  "TARGET_AVX && <mask_avx512vl_condition>"
-  "vcvtpd2dq{y}\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
+  "TARGET_AVX && <mask_avx512vl_condition>
+   && (!<round_applied> || TARGET_AVX10_2_256)"
+  "vcvtpd2dq<round_suff>\t{<round_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_mask_op2>}"
   [(set_attr "type" "ssecvt")
    (set_attr "prefix" "<mask_prefix>")
    (set_attr "mode" "OI")])
@@ -9236,8 +9237,8 @@
 	(unspec:<si2dfmode>
 	  [(match_operand:VF2_512_256VL 1 "nonimmediate_operand" "<round_constraint>")]
 	  UNSPEC_UNSIGNED_FIX_NOTRUNC))]
-  "TARGET_AVX512F"
-  "vcvtpd2udq<pd2udqsuff>\t{<round_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_mask_op2>}"
+  "TARGET_AVX512F && <round_mode_condition>"
+  "vcvtpd2udq<round_pd2udqsuff>\t{<round_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_mask_op2>}"
   [(set_attr "type" "ssecvt")
    (set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])
diff --git a/gcc/config/i386/subst.md b/gcc/config/i386/subst.md
index ea3ad9a206a..2f28874ff03 100644
--- a/gcc/config/i386/subst.md
+++ b/gcc/config/i386/subst.md
@@ -199,6 +199,7 @@
 (define_subst_attr "round_constraint" "round" "vm" "v")
 (define_subst_attr "round_suff" "round" "{y}" "")
 (define_subst_attr "round_qq2phsuff" "round" "<qq2phsuff>" "")
+(define_subst_attr "round_pd2udqsuff" "round" "<pd2udqsuff>" "")
 (define_subst_attr "bcst_round_constraint" "round" "vmBr" "v")
 (define_subst_attr "round_constraint2" "round" "m" "v")
 (define_subst_attr "round_constraint3" "round" "rm" "r")
diff --git a/gcc/testsuite/gcc.target/i386/avx-1.c b/gcc/testsuite/gcc.target/i386/avx-1.c
index 3d7d4231124..c8229627bd9 100644
--- a/gcc/testsuite/gcc.target/i386/avx-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx-1.c
@@ -853,6 +853,10 @@
 #define __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, 8)
 #define __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, 8)
 #define __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, 8)
+#define __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, 8)
+#define __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, 8)
+#define __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, 8)
+#define __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, 8)
 
 #include <wmmintrin.h>
 #include <immintrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c
index bf77164729d..31b1961739c 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-1.c
@@ -27,10 +27,23 @@
 /* { dg-final { scan-assembler-times "vcvtpd2ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1  }  } */
 /* { dg-final { scan-assembler-times "vcvtpd2ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1  }  } */
 /* { dg-final { scan-assembler-times "vcvtpd2ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vcvtpd2dq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vcvtpd2dq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vcvtpd2dq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vcvtpd2qq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vcvtpd2udq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vcvtpd2udq\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vcvtpd2udq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\n\]*%ymm\[0-9\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vcvtpd2uqq\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1  }  } */
 
 #include <immintrin.h>
 
 volatile __m128 hx;
+volatile __m128i hxi;
 volatile __m128h hxh;
 volatile __m256 x;
 volatile __m256d xd;
@@ -92,3 +105,23 @@ avx10_2_test_4 (void)
   hx = _mm256_mask_cvt_roundpd_ps (hx, 4, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC);
   hx = _mm256_maskz_cvt_roundpd_ps (6, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
 }
+
+void extern
+avx10_2_test_5 (void)
+{
+  hxi = _mm256_cvt_roundpd_epi32 (xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+  hxi = _mm256_mask_cvt_roundpd_epi32 (hxi, m8, xd, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
+  hxi = _mm256_maskz_cvt_roundpd_epi32 (m8, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+
+  xi = _mm256_cvt_roundpd_epi64 (xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+  xi = _mm256_mask_cvt_roundpd_epi64 (xi, m8, xd, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
+  xi = _mm256_maskz_cvt_roundpd_epi64 (m8, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+
+  hxi = _mm256_cvt_roundpd_epu32 (xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+  hxi = _mm256_mask_cvt_roundpd_epu32 (hxi, m8, xd, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
+  hxi = _mm256_maskz_cvt_roundpd_epu32 (m8, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+
+  xi = _mm256_cvt_roundpd_epu64 (xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+  xi = _mm256_mask_cvt_roundpd_epu64 (xi, m8, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC);
+  xi = _mm256_maskz_cvt_roundpd_epu64 (m8, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c
index c1d6486f560..356aa345b5c 100644
--- a/gcc/testsuite/gcc.target/i386/sse-13.c
+++ b/gcc/testsuite/gcc.target/i386/sse-13.c
@@ -860,5 +860,9 @@
 #define __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, 8)
 #define __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, 8)
 #define __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, 8)
+#define __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, 8)
+#define __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, 8)
+#define __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, 8)
+#define __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, 8)
 
 #include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c b/gcc/testsuite/gcc.target/i386/sse-14.c
index 2a5ab69135b..8ff8b4db8cf 100644
--- a/gcc/testsuite/gcc.target/i386/sse-14.c
+++ b/gcc/testsuite/gcc.target/i386/sse-14.c
@@ -1025,6 +1025,10 @@ test_1 (_mm256_cvt_roundepi32_ph, __m128h, __m256i, 8)
 test_1 (_mm256_cvt_roundepi32_ps, __m256, __m256i, 9)
 test_1 (_mm256_cvt_roundpd_ph, __m128h, __m256d, 8)
 test_1 (_mm256_cvt_roundpd_ps, __m128, __m256d, 9)
+test_1 (_mm256_cvt_roundpd_epi32, __m128i, __m256d, 9)
+test_1 (_mm256_cvt_roundpd_epi64, __m256i, __m256d, 9)
+test_1 (_mm256_cvt_roundpd_epu32, __m128i, __m256d, 9)
+test_1 (_mm256_cvt_roundpd_epu64, __m256i, __m256d, 9)
 test_2 (_mm256_add_round_pd, __m256d, __m256d, __m256d, 9)
 test_2 (_mm256_add_round_ph, __m256h, __m256h, __m256h, 8)
 test_2 (_mm256_add_round_ps, __m256, __m256, __m256, 9)
@@ -1032,6 +1036,10 @@ test_2 (_mm256_maskz_cvt_roundepi32_ph, __m128h, __mmask8, __m256i, 8)
 test_2 (_mm256_maskz_cvt_roundepi32_ps, __m256, __mmask8, __m256i, 9)
 test_2 (_mm256_maskz_cvt_roundpd_ph, __m128h, __mmask8, __m256d, 8)
 test_2 (_mm256_maskz_cvt_roundpd_ps, __m128, __mmask8, __m256d, 9)
+test_2 (_mm256_maskz_cvt_roundpd_epi32, __m128i, __mmask8, __m256d, 9)
+test_2 (_mm256_maskz_cvt_roundpd_epi64, __m256i, __mmask8, __m256d, 9)
+test_2 (_mm256_maskz_cvt_roundpd_epu32, __m128i, __mmask8, __m256d, 9)
+test_2 (_mm256_maskz_cvt_roundpd_epu64, __m256i, __mmask8, __m256d, 9)
 test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8)
 test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8)
 test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8)
@@ -1042,6 +1050,10 @@ test_3 (_mm256_mask_cvt_roundepi32_ph, __m128h, __m128h, __mmask8, __m256i, 8)
 test_3 (_mm256_mask_cvt_roundepi32_ps, __m256, __m256, __mmask8, __m256i, 9)
 test_3 (_mm256_mask_cvt_roundpd_ph, __m128h, __m128h, __mmask8, __m256d, 8)
 test_3 (_mm256_mask_cvt_roundpd_ps, __m128, __m128, __mmask8, __m256d, 9)
+test_3 (_mm256_mask_cvt_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 9)
+test_3 (_mm256_mask_cvt_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 9)
+test_3 (_mm256_mask_cvt_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 9)
+test_3 (_mm256_mask_cvt_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 9)
 test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 1, 8)
 test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, __m256h, 1, 8)
 test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 8)
diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c b/gcc/testsuite/gcc.target/i386/sse-22.c
index 32be2373a8b..a27a740cc9e 100644
--- a/gcc/testsuite/gcc.target/i386/sse-22.c
+++ b/gcc/testsuite/gcc.target/i386/sse-22.c
@@ -1066,6 +1066,10 @@ test_1 (_mm256_cvt_roundepi32_ph, __m128h, __m256i, 8)
 test_1 (_mm256_cvt_roundepi32_ps, __m256, __m256i, 9)
 test_1 (_mm256_cvt_roundpd_ph, __m128h, __m256d, 8)
 test_1 (_mm256_cvt_roundpd_ps, __m128, __m256d, 9)
+test_1 (_mm256_cvt_roundpd_epi32, __m128i, __m256d, 9)
+test_1 (_mm256_cvt_roundpd_epi64, __m256i, __m256d, 9)
+test_1 (_mm256_cvt_roundpd_epu32, __m128i, __m256d, 9)
+test_1 (_mm256_cvt_roundpd_epu64, __m256i, __m256d, 9)
 test_2 (_mm256_add_round_pd, __m256d, __m256d, __m256d, 9)
 test_2 (_mm256_add_round_ph, __m256h, __m256h, __m256h, 8)
 test_2 (_mm256_add_round_ps, __m256, __m256, __m256, 9)
@@ -1073,6 +1077,10 @@ test_2 (_mm256_maskz_cvt_roundepi32_ph, __m128h, __mmask8, __m256i, 8)
 test_2 (_mm256_maskz_cvt_roundepi32_ps, __m256, __mmask8, __m256i, 9)
 test_2 (_mm256_maskz_cvt_roundpd_ph, __m128h, __mmask8, __m256d, 8)
 test_2 (_mm256_maskz_cvt_roundpd_ps, __m128, __mmask8, __m256d, 9)
+test_2 (_mm256_maskz_cvt_roundpd_epi32, __m128i, __mmask8, __m256d, 9)
+test_2 (_mm256_maskz_cvt_roundpd_epi64, __m256i, __mmask8, __m256d, 9)
+test_2 (_mm256_maskz_cvt_roundpd_epu32, __m128i, __mmask8, __m256d, 9)
+test_2 (_mm256_maskz_cvt_roundpd_epu64, __m256i, __mmask8, __m256d, 9)
 test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8)
 test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8)
 test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8)
@@ -1083,6 +1091,10 @@ test_3 (_mm256_mask_cvt_roundepi32_ph, __m128h, __m128h, __mmask8, __m256i, 8)
 test_3 (_mm256_mask_cvt_roundepi32_ps, __m256, __m256, __mmask8, __m256i, 9)
 test_3 (_mm256_mask_cvt_roundpd_ph, __m128h, __m128h, __mmask8, __m256d, 8)
 test_3 (_mm256_mask_cvt_roundpd_ps, __m128, __m128, __mmask8, __m256d, 9)
+test_3 (_mm256_mask_cvt_roundpd_epi32, __m128i, __m128i, __mmask8, __m256d, 9)
+test_3 (_mm256_mask_cvt_roundpd_epu32, __m128i, __m128i, __mmask8, __m256d, 9)
+test_3 (_mm256_mask_cvt_roundpd_epi64, __m256i, __m256i, __mmask8, __m256d, 9)
+test_3 (_mm256_mask_cvt_roundpd_epu64, __m256i, __m256i, __mmask8, __m256d, 9)
 test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 1, 8)
 test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, __m256h, 1, 8)
 test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 8)
diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c b/gcc/testsuite/gcc.target/i386/sse-23.c
index 0a3d61fbdd7..d9e0ac434dd 100644
--- a/gcc/testsuite/gcc.target/i386/sse-23.c
+++ b/gcc/testsuite/gcc.target/i386/sse-23.c
@@ -835,6 +835,10 @@
 #define __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtdq2ps256_mask_round(A, B, C, 8)
 #define __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, D) __builtin_ia32_vcvtpd2ph256_mask_round(A, B, C, 8)
 #define __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2ps256_mask_round(A, B, C, 8)
+#define __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2dq256_mask_round(A, B, C, 8)
+#define __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2qq256_mask_round(A, B, C, 8)
+#define __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2udq256_mask_round(A, B, C, 8)
+#define __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, D) __builtin_ia32_cvtpd2uqq256_mask_round(A, B, C, 8)
 
 #pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,sha,xsavec,xsaves,clflushopt,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,vpclmulqdq,pconfig,wbnoinvd,enqcmd,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avxifma,avxvnniint8,avxneconvert,cmpccxadd,amx-fp16,prefetchi,raoint,amx-complex,avxvnniint16,sm3,sha512,sm4,avx10.2-512")
 
