diff --git a/gcc/config/i386/avx10_2roundingintrin.h b/gcc/config/i386/avx10_2roundingintrin.h
index a5712f5230a..ac0914415c9 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -3454,6 +3454,198 @@ _mm256_maskz_min_round_ps (__mmask8 __U, __m256 __A, __m256 __B,
 						      (__mmask8) __U,
 						      __R);
 }
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mul_round_pd (__m256d __A, __m256d __B, const int __R)
+{
+  return (__m256d) __builtin_ia32_mulpd256_mask_round ((__v4df) __A,
+						       (__v4df) __B,
+						       (__v4df)
+						       _mm256_undefined_pd (),
+						       (__mmask8) -1,
+						       __R);
+}
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_mul_round_pd (__m256d __W, __mmask8 __U, __m256d __A,
+			  __m256d __B, const int __R)
+{
+  return (__m256d) __builtin_ia32_mulpd256_mask_round ((__v4df) __A,
+						       (__v4df) __B,
+						       (__v4df) __W,
+						       (__mmask8) __U,
+						       __R);
+}
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_mul_round_pd (__mmask8 __U, __m256d __A, __m256d __B,
+			   const int __R)
+{
+  return (__m256d) __builtin_ia32_mulpd256_mask_round ((__v4df) __A,
+						       (__v4df) __B,
+						       (__v4df)
+						       _mm256_setzero_pd (),
+						       (__mmask8) __U,
+						       __R);
+}
+
+extern __inline __m256h
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mul_round_ph (__m256h __A, __m256h __B, const int __R)
+{
+  return (__m256h) __builtin_ia32_mulph256_mask_round ((__v16hf) __A,
+						       (__v16hf) __B,
+						       (__v16hf)
+						       _mm256_undefined_ph (),
+						       (__mmask16) -1,
+						       __R);
+}
+
+extern __inline __m256h
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_mul_round_ph (__m256h __W, __mmask16 __U, __m256h __A,
+			  __m256h __B, const int __R)
+{
+  return (__m256h) __builtin_ia32_mulph256_mask_round ((__v16hf) __A,
+						       (__v16hf) __B,
+						       (__v16hf) __W,
+						       (__mmask16) __U,
+						       __R);
+}
+
+extern __inline __m256h
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_mul_round_ph (__mmask16 __U, __m256h __A, __m256h __B,
+			   const int __R)
+{
+  return (__m256h) __builtin_ia32_mulph256_mask_round ((__v16hf) __A,
+						       (__v16hf) __B,
+						       (__v16hf)
+						       _mm256_setzero_ph (),
+						       (__mmask16) __U,
+						       __R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mul_round_ps (__m256 __A, __m256 __B, const int __R)
+{
+  return (__m256) __builtin_ia32_mulps256_mask_round ((__v8sf) __A,
+						      (__v8sf) __B,
+						      (__v8sf)
+						      _mm256_undefined_ps (),
+						      (__mmask8) -1,
+						      __R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_mul_round_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B,
+			  const int __R)
+{
+  return (__m256) __builtin_ia32_mulps256_mask_round ((__v8sf) __A,
+						      (__v8sf) __B,
+						      (__v8sf) __W,
+						      (__mmask8) __U,
+						      __R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_mul_round_ps (__mmask8 __U, __m256 __A, __m256 __B,
+			   const int __R)
+{
+  return (__m256) __builtin_ia32_mulps256_mask_round ((__v8sf) __A,
+						      (__v8sf) __B,
+						      (__v8sf)
+						      _mm256_setzero_ps (),
+						      (__mmask8) __U,
+						      __R);
+}
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_range_round_pd (__m256d __A, __m256d __B, const int __C,
+		       const int __R)
+{
+  return (__m256d) __builtin_ia32_rangepd256_mask_round ((__v4df) __A,
+							 (__v4df) __B,
+							 __C,
+							 (__v4df)
+							 _mm256_setzero_pd (),
+							 (__mmask8) -1,
+							 __R);
+}
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_range_round_pd (__m256d __W, __mmask8 __U, __m256d __A,
+			    __m256d __B, const int __C, const int __R)
+{
+  return (__m256d) __builtin_ia32_rangepd256_mask_round ((__v4df) __A,
+							 (__v4df) __B,
+							 __C,
+							 (__v4df) __W,
+							 (__mmask8) __U,
+							 __R);
+}
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_range_round_pd (__mmask8 __U, __m256d __A, __m256d __B,
+			     const int __C, const int __R)
+{
+  return (__m256d) __builtin_ia32_rangepd256_mask_round ((__v4df) __A,
+							 (__v4df) __B,
+							 __C,
+							 (__v4df)
+							 _mm256_setzero_pd (),
+							 (__mmask8) __U,
+							 __R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_range_round_ps (__m256 __A, __m256 __B, const int __C, const int __R)
+{
+  return (__m256) __builtin_ia32_rangeps256_mask_round ((__v8sf) __A,
+							(__v8sf) __B,
+							__C,
+							(__v8sf)
+							_mm256_setzero_ps (),
+							(__mmask8) -1,
+							__R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_range_round_ps (__m256 __W, __mmask8 __U, __m256 __A,
+			    __m256 __B, const int __C, const int __R)
+{
+  return (__m256) __builtin_ia32_rangeps256_mask_round ((__v8sf) __A,
+							(__v8sf) __B,
+							__C,
+							(__v8sf) __W,
+							(__mmask8) __U,
+							__R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_range_round_ps (__mmask8 __U, __m256 __A, __m256 __B,
+			     const int __C, const int __R)
+{
+  return (__m256) __builtin_ia32_rangeps256_mask_round ((__v8sf) __A,
+							(__v8sf) __B,
+							__C,
+							(__v8sf)
+							_mm256_setzero_ps (),
+							(__mmask8) __U,
+							__R);
+}
 #else
 #define _mm256_add_round_pd(A, B, R) \
   ((__m256d) __builtin_ia32_addpd256_mask_round ((__v4df) (A), \
@@ -5210,6 +5402,127 @@ _mm256_maskz_min_round_ps (__mmask8 __U, __m256 __A, __m256 __B,
 						(_mm256_setzero_ps ()), \
 						(__mmask8) (U), \
 						(R)))
+
+#define _mm256_mul_round_pd(A, B, R) \
+  ((__m256d) __builtin_ia32_mulpd256_mask_round ((__v4df) (A), \
+						 (__v4df) (B), \
+						 (__v4df) \
+						 (_mm256_undefined_pd ()), \
+						 (__mmask8) (-1), \
+						 (R)))
+
+#define _mm256_mask_mul_round_pd(W, U, A, B, R) \
+  ((__m256d) __builtin_ia32_mulpd256_mask_round ((__v4df) (A), \
+						 (__v4df) (B), \
+						 (__v4df) (W), \
+						 (__mmask8) (U), \
+						 (R)))
+
+#define _mm256_maskz_mul_round_pd(U, A, B, R) \
+  ((__m256d) __builtin_ia32_mulpd256_mask_round ((__v4df) (A), \
+						 (__v4df) (B), \
+						 (__v4df) \
+						 (_mm256_setzero_pd ()), \
+						 (__mmask8) (U), \
+						 (R)))
+
+#define _mm256_mul_round_ph(A, B, R) \
+  ((__m256h) __builtin_ia32_mulph256_mask_round ((__v16hf) (A), \
+						 (__v16hf) (B), \
+						 (__v16hf) \
+						 (_mm256_undefined_ph ()), \
+						 (__mmask16) (-1), \
+						 (R)))
+
+#define _mm256_mask_mul_round_ph(W, U, A, B, R) \
+  ((__m256h) __builtin_ia32_mulph256_mask_round ((__v16hf) (A), \
+						 (__v16hf) (B), \
+						 (__v16hf) (W), \
+						 (__mmask16) (U), \
+						 (R)))
+
+#define _mm256_maskz_mul_round_ph(U, A, B, R) \
+  ((__m256h) __builtin_ia32_mulph256_mask_round ((__v16hf) (A), \
+						 (__v16hf) (B), \
+						 (__v16hf) \
+						 (_mm256_setzero_ph ()), \
+						 (__mmask16) (U), \
+						 (R)))
+
+#define _mm256_mul_round_ps(A, B, R) \
+  ((__m256) __builtin_ia32_mulps256_mask_round ((__v8sf) (A), \
+						(__v8sf) (B), \
+						(__v8sf) \
+						(_mm256_undefined_ps ()), \
+						(__mmask8) (-1), \
+						(R)))
+
+#define _mm256_mask_mul_round_ps(W, U, A, B, R) \
+  ((__m256) __builtin_ia32_mulps256_mask_round ((__v8sf) (A), \
+						(__v8sf) (B), \
+						(__v8sf) (W), \
+						(__mmask8) (U), \
+						(R)))
+
+#define _mm256_maskz_mul_round_ps(U, A, B, R) \
+  ((__m256) __builtin_ia32_mulps256_mask_round ((__v8sf) (A), \
+						(__v8sf) (B), \
+						(__v8sf) \
+						(_mm256_setzero_ps ()), \
+						(__mmask8) (U), \
+						(R)))
+
+#define _mm256_range_round_pd(A, B, C, R) \
+  ((__m256d) __builtin_ia32_rangepd256_mask_round ((__v4df) (A), \
+						   (__v4df) (B), \
+						   (C), \
+						   (__v4df) \
+						   (_mm256_setzero_pd ()), \
+						   (__mmask8) (-1), \
+						   (R)))
+
+#define _mm256_mask_range_round_pd(W, U, A, B, C, R) \
+  ((__m256d) __builtin_ia32_rangepd256_mask_round ((__v4df) (A), \
+						   (__v4df) (B), \
+						   (C), \
+						   (__v4df) (W), \
+						   (__mmask8) (U), \
+						   (R)))
+
+#define _mm256_maskz_range_round_pd(U, A, B, C, R) \
+  ((__m256d) __builtin_ia32_rangepd256_mask_round ((__v4df) (A), \
+						   (__v4df) (B), \
+						   (C), \
+						   (__v4df) \
+						   (_mm256_setzero_pd ()), \
+						   (__mmask8) (U), \
+						   (R)))
+
+#define _mm256_range_round_ps(A, B, C, R) \
+  ((__m256) __builtin_ia32_rangeps256_mask_round ((__v8sf) (A), \
+						  (__v8sf) (B), \
+						  (C), \
+						  (__v8sf) \
+						  (_mm256_setzero_ps ()), \
+						  (__mmask8) (-1), \
+						  (R)))
+
+#define _mm256_mask_range_round_ps(W, U, A, B, C, R) \
+  ((__m256) __builtin_ia32_rangeps256_mask_round ((__v8sf) (A), \
+						  (__v8sf) (B), \
+						  (C), \
+						  (__v8sf) (W), \
+						  (__mmask8) (U), \
+						  (R)))
+
+#define _mm256_maskz_range_round_ps(U, A, B, C, R) \
+  ((__m256) __builtin_ia32_rangeps256_mask_round ((__v8sf) (A), \
+						  (__v8sf) (B), \
+						  (C), \
+						  (__v8sf) \
+						  (_mm256_setzero_ps ()), \
+						  (__mmask8) (U), \
+						  (R)))
 #endif
 
 #define _mm256_cmul_round_pch(A, B, R) _mm256_fcmul_round_pch ((A), (B), (R))
diff --git a/gcc/config/i386/i386-builtin-types.def b/gcc/config/i386/i386-builtin-types.def
index 738cb786ff6..f5fa2544cc5 100644
--- a/gcc/config/i386/i386-builtin-types.def
+++ b/gcc/config/i386/i386-builtin-types.def
@@ -1451,3 +1451,5 @@ DEF_FUNCTION_TYPE (V8SF, V8SF, V8SF, UQI, INT)
 DEF_FUNCTION_TYPE (V4DF, V4DF, INT, V4DF, UQI, INT)
 DEF_FUNCTION_TYPE (V16HF, V16HF, INT, V16HF, UHI, INT)
 DEF_FUNCTION_TYPE (V8SF, V8SF, INT, V8SF, UQI, INT)
+DEF_FUNCTION_TYPE (V4DF, V4DF, V4DF, INT, V4DF, UQI, INT)
+DEF_FUNCTION_TYPE (V8SF, V8SF, V8SF, INT, V8SF, UQI, INT)
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index e5f837133ac..232ec53f4f8 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -3457,6 +3457,11 @@ BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_smaxv8sf3_mask_round, "__builti
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_sminv4df3_mask_round, "__builtin_ia32_minpd256_mask_round", IX86_BUILTIN_VMINPD256_MASK_ROUND, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_V4DF_UQI_INT)
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_sminv16hf3_mask_round, "__builtin_ia32_minph256_mask_round", IX86_BUILTIN_VMINPH256_MASK_ROUND, UNKNOWN, (int) V16HF_FTYPE_V16HF_V16HF_V16HF_UHI_INT)
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_sminv8sf3_mask_round, "__builtin_ia32_minps256_mask_round", IX86_BUILTIN_VMINPS256_MASK_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_mulv4df3_mask_round, "__builtin_ia32_mulpd256_mask_round", IX86_BUILTIN_VMULPD256_MASK_ROUND, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_V4DF_UQI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_mulv16hf3_mask_round, "__builtin_ia32_mulph256_mask_round", IX86_BUILTIN_VMULPH256_MASK_ROUND, UNKNOWN, (int) V16HF_FTYPE_V16HF_V16HF_V16HF_UHI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_mulv8sf3_mask_round, "__builtin_ia32_mulps256_mask_round", IX86_BUILTIN_VMULPS256_MASK_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512dq_rangepv4df_mask_round, "__builtin_ia32_rangepd256_mask_round", IX86_BUILTIN_VRANGEPD256_MASK_ROUND, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_INT_V4DF_UQI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512dq_rangepv8sf_mask_round, "__builtin_ia32_rangeps256_mask_round", IX86_BUILTIN_VRANGEPS256_MASK_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_INT_V8SF_UQI_INT)
 
 BDESC_END (ROUND_ARGS, MULTI_ARG)
 
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index 02f0f093abf..21e7c09d9e0 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -12552,6 +12552,8 @@ ix86_expand_round_builtin (const struct builtin_description *d,
       break;
     case V16SF_FTYPE_V16SF_V16SF_INT_V16SF_HI_INT:
     case V8DF_FTYPE_V8DF_V8DF_INT_V8DF_QI_INT:
+    case V8SF_FTYPE_V8SF_V8SF_INT_V8SF_UQI_INT:
+    case V4DF_FTYPE_V4DF_V4DF_INT_V4DF_UQI_INT:
     case V4SF_FTYPE_V4SF_V4SF_INT_V4SF_QI_INT:
     case V2DF_FTYPE_V2DF_V2DF_INT_V2DF_QI_INT:
     case V2DF_FTYPE_V2DF_V2DF_INT_V2DF_UQI_INT:
diff --git a/gcc/testsuite/gcc.target/i386/avx-1.c b/gcc/testsuite/gcc.target/i386/avx-1.c
index 9b1d808525f..8d133f047d2 100644
--- a/gcc/testsuite/gcc.target/i386/avx-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx-1.c
@@ -981,6 +981,11 @@
 #define __builtin_ia32_minpd256_mask_round(A, B, C, D, E) __builtin_ia32_minpd256_mask_round(A, B, C, D, 8)
 #define __builtin_ia32_minph256_mask_round(A, B, C, D, E) __builtin_ia32_minph256_mask_round(A, B, C, D, 8)
 #define __builtin_ia32_minps256_mask_round(A, B, C, D, E) __builtin_ia32_minps256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_mulpd256_mask_round(A, B, C, D, E) __builtin_ia32_mulpd256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_mulph256_mask_round(A, B, C, D, E) __builtin_ia32_mulph256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_mulps256_mask_round(A, B, C, D, E) __builtin_ia32_mulps256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_rangeps256_mask_round(A, B, I, D, E, F) __builtin_ia32_rangeps256_mask_round(A, B, 1, D, E, 8)
+#define __builtin_ia32_rangepd256_mask_round(A, B, I, D, E, F) __builtin_ia32_rangepd256_mask_round(A, B, 1, D, E, 8)
 
 #include <wmmintrin.h>
 #include <immintrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
index aa3b3ab070e..dd3e8be85fd 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
@@ -141,6 +141,21 @@
 /* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)"  1  }  } */
 /* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1  }  } */
 /* { dg-final { scan-assembler-times "vminps\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vmulpd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vmulph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vmulps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)"  1  }  } */
+/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vrangepd\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)"  1  }  } */
+/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vrangeps\[ \\t\]+\[^\$\n\]*\\$\[^\{\n\]*\{sae\}\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1  }  } */
 
 #include <immintrin.h>
 
@@ -431,3 +446,31 @@ avx10_2_test_19 (void)
   x = _mm256_mask_min_round_ps (x, m8, x, x, _MM_FROUND_NO_EXC);
   x = _mm256_maskz_min_round_ps (m8, x, x, _MM_FROUND_NO_EXC);
 }
+
+void extern
+avx10_2_test_20 (void)
+{
+  xd = _mm256_mul_round_pd (xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+  xd = _mm256_mask_mul_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC);
+  xd = _mm256_maskz_mul_round_pd (m8, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+
+  xh = _mm256_mul_round_ph (xh, xh, 8);
+  xh = _mm256_mask_mul_round_ph (xh, m16, xh, xh, 8);
+  xh = _mm256_maskz_mul_round_ph (m16, xh, xh, 11);
+
+  x = _mm256_mul_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+  x = _mm256_mask_mul_round_ps (x, m8, x, x, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
+  x = _mm256_maskz_mul_round_ps (m8, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+void extern
+avx10_2_test_21 (void)
+{
+  xd = _mm256_range_round_pd (xd, xd, 15, _MM_FROUND_NO_EXC);
+  xd = _mm256_mask_range_round_pd (xd, m8, xd, xd, 15, _MM_FROUND_NO_EXC);
+  xd = _mm256_maskz_range_round_pd (m8, xd, xd, 15, _MM_FROUND_NO_EXC);
+
+  x = _mm256_range_round_ps (x, x, 15, _MM_FROUND_NO_EXC);
+  x = _mm256_mask_range_round_ps (x, m16, x, x, 15, _MM_FROUND_NO_EXC);
+  x = _mm256_maskz_range_round_ps (m16, x, x, 15, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c
index a0276e3e142..95005c311ac 100644
--- a/gcc/testsuite/gcc.target/i386/sse-13.c
+++ b/gcc/testsuite/gcc.target/i386/sse-13.c
@@ -988,5 +988,10 @@
 #define __builtin_ia32_minpd256_mask_round(A, B, C, D, E) __builtin_ia32_minpd256_mask_round(A, B, C, D, 8)
 #define __builtin_ia32_minph256_mask_round(A, B, C, D, E) __builtin_ia32_minph256_mask_round(A, B, C, D, 8)
 #define __builtin_ia32_minps256_mask_round(A, B, C, D, E) __builtin_ia32_minps256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_mulpd256_mask_round(A, B, C, D, E) __builtin_ia32_mulpd256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_mulph256_mask_round(A, B, C, D, E) __builtin_ia32_mulph256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_mulps256_mask_round(A, B, C, D, E) __builtin_ia32_mulps256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_rangeps256_mask_round(A, B, C, D, E, F) __builtin_ia32_rangeps256_mask_round(A, B, 1, D, E, 8)
+#define __builtin_ia32_rangepd256_mask_round(A, B, C, D, E, F) __builtin_ia32_rangepd256_mask_round(A, B, 1, D, E, 8)
 
 #include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c b/gcc/testsuite/gcc.target/i386/sse-14.c
index ed78fef8a05..9e61ef99b3c 100644
--- a/gcc/testsuite/gcc.target/i386/sse-14.c
+++ b/gcc/testsuite/gcc.target/i386/sse-14.c
@@ -1135,9 +1135,14 @@ test_2 (_mm256_max_round_ps, __m256, __m256, __m256, 8)
 test_2 (_mm256_min_round_pd, __m256d, __m256d, __m256d, 8)
 test_2 (_mm256_min_round_ph, __m256h, __m256h, __m256h, 8)
 test_2 (_mm256_min_round_ps, __m256, __m256, __m256, 8)
+test_2 (_mm256_mul_round_pd, __m256d, __m256d, __m256d, 9)
+test_2 (_mm256_mul_round_ph, __m256h, __m256h, __m256h, 9)
+test_2 (_mm256_mul_round_ps, __m256, __m256, __m256, 9)
 test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8)
 test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8)
 test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8)
+test_2x (_mm256_range_round_pd, __m256d, __m256d, __m256d, 15, 8)
+test_2x (_mm256_range_round_ps, __m256, __m256, __m256, 15, 8)
 test_2y (_mm256_maskz_getmant_round_pd, __m256d, __mmask8, __m256d, 1, 1, 8)
 test_2y (_mm256_maskz_getmant_round_ph, __m256h, __mmask16, __m256h, 1, 1, 8)
 test_2y (_mm256_maskz_getmant_round_ps, __m256, __mmask8, __m256, 1, 1, 8)
@@ -1225,11 +1230,16 @@ test_3 (_mm256_maskz_max_round_ps, __m256, __mmask8, __m256, __m256, 8)
 test_3 (_mm256_maskz_min_round_pd, __m256d, __mmask8, __m256d, __m256d, 8)
 test_3 (_mm256_maskz_min_round_ph, __m256h, __mmask16, __m256h, __m256h, 8)
 test_3 (_mm256_maskz_min_round_ps, __m256, __mmask8, __m256, __m256, 8)
+test_3 (_mm256_maskz_mul_round_pd, __m256d, __mmask8, __m256d, __m256d, 9)
+test_3 (_mm256_maskz_mul_round_ph, __m256h, __mmask16, __m256h, __m256h, 9)
+test_3 (_mm256_maskz_mul_round_ps, __m256, __mmask8, __m256, __m256, 9)
 test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 1, 8)
 test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, __m256h, 1, 8)
 test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 8)
 test_3x (_mm256_fixupimm_round_pd, __m256d, __m256d, __m256d, __m256i, 3, 8)
 test_3x (_mm256_fixupimm_round_ps, __m256, __m256, __m256, __m256i, 3, 8)
+test_3x (_mm256_maskz_range_round_pd, __m256d, __mmask8, __m256d, __m256d, 15, 8)
+test_3x (_mm256_maskz_range_round_ps, __m256, __mmask8, __m256, __m256, 15, 8)
 test_3y (_mm256_mask_getmant_round_pd, __m256d, __m256d, __mmask8, __m256d, 1, 1, 8)
 test_3y (_mm256_mask_getmant_round_ph, __m256h, __m256h, __mmask16, __m256h, 1, 1, 8)
 test_3y (_mm256_mask_getmant_round_ps, __m256, __m256, __mmask8, __m256, 1, 1, 8)
@@ -1307,7 +1317,12 @@ test_4 (_mm256_mask_max_round_ps, __m256, __m256, __mmask8, __m256, __m256, 8)
 test_4 (_mm256_mask_min_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 8)
 test_4 (_mm256_mask_min_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 8)
 test_4 (_mm256_mask_min_round_ps, __m256, __m256, __mmask8, __m256, __m256, 8)
+test_4 (_mm256_mask_mul_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9)
+test_4 (_mm256_mask_mul_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9)
+test_4 (_mm256_mask_mul_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
 test_4x (_mm256_maskz_fixupimm_round_pd, __m256d, __mmask8, __m256d, __m256d, __m256i, 3, 8)
 test_4x (_mm256_maskz_fixupimm_round_ps, __m256, __mmask8, __m256, __m256, __m256i, 3, 8)
 test_4x (_mm256_mask_fixupimm_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256i, 3, 8)
 test_4x (_mm256_mask_fixupimm_round_ps, __m256, __m256, __mmask8, __m256, __m256i, 3, 8)
+test_4x (_mm256_mask_range_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 15, 8)
+test_4x (_mm256_mask_range_round_ps, __m256, __m256, __mmask8, __m256, __m256, 15, 8)
diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c b/gcc/testsuite/gcc.target/i386/sse-22.c
index 2667aa8bf57..cc37230fa01 100644
--- a/gcc/testsuite/gcc.target/i386/sse-22.c
+++ b/gcc/testsuite/gcc.target/i386/sse-22.c
@@ -1178,9 +1178,14 @@ test_2 (_mm256_max_round_ps, __m256, __m256, __m256, 8)
 test_2 (_mm256_min_round_pd, __m256d, __m256d, __m256d, 8)
 test_2 (_mm256_min_round_ph, __m256h, __m256h, __m256h, 8)
 test_2 (_mm256_min_round_ps, __m256, __m256, __m256, 8)
+test_2 (_mm256_mul_round_pd, __m256d, __m256d, __m256d, 9)
+test_2 (_mm256_mul_round_ph, __m256h, __m256h, __m256h, 9)
+test_2 (_mm256_mul_round_ps, __m256, __m256, __m256, 9)
 test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8)
 test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8)
 test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8)
+test_2x (_mm256_range_round_pd, __m256d, __m256d, __m256d, 15, 8)
+test_2x (_mm256_range_round_ps, __m256, __m256, __m256, 15, 8)
 test_2y (_mm256_maskz_getmant_round_pd, __m256d, __mmask8, __m256d, 1, 1, 8)
 test_2y (_mm256_maskz_getmant_round_ph, __m256h, __mmask16, __m256h, 1, 1, 8)
 test_2y (_mm256_maskz_getmant_round_ps, __m256, __mmask8, __m256, 1, 1, 8)
@@ -1267,11 +1272,16 @@ test_3 (_mm256_maskz_max_round_ps, __m256, __mmask8, __m256, __m256, 8)
 test_3 (_mm256_maskz_min_round_pd, __m256d, __mmask8, __m256d, __m256d, 8)
 test_3 (_mm256_maskz_min_round_ph, __m256h, __mmask16, __m256h, __m256h, 8)
 test_3 (_mm256_maskz_min_round_ps, __m256, __mmask8, __m256, __m256, 8)
+test_3 (_mm256_maskz_mul_round_pd, __m256d, __mmask8, __m256d, __m256d, 9)
+test_3 (_mm256_maskz_mul_round_ph, __m256h, __mmask16, __m256h, __m256h, 9)
+test_3 (_mm256_maskz_mul_round_ps, __m256, __mmask8, __m256, __m256, 9)
 test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 1, 8)
 test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, __m256h, 1, 8)
 test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 8)
 test_3x (_mm256_fixupimm_round_pd, __m256d, __m256d, __m256d, __m256i, 3, 8)
 test_3x (_mm256_fixupimm_round_ps, __m256, __m256, __m256, __m256i, 3, 8)
+test_3x (_mm256_maskz_range_round_pd, __m256d, __mmask8, __m256d, __m256d, 15, 8)
+test_3x (_mm256_maskz_range_round_ps, __m256, __mmask16, __m256, __m256, 15, 8)
 test_3y (_mm256_mask_getmant_round_pd, __m256d, __m256d, __mmask8, __m256d, 1, 1, 8)
 test_3y (_mm256_mask_getmant_round_ph, __m256h, __m256h, __mmask16, __m256h, 1, 1, 8)
 test_3y (_mm256_mask_getmant_round_ps, __m256, __m256, __mmask8, __m256, 1, 1, 8)
@@ -1349,7 +1359,12 @@ test_4 (_mm256_mask_max_round_ps, __m256, __m256, __mmask8, __m256, __m256, 8)
 test_4 (_mm256_mask_min_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 8)
 test_4 (_mm256_mask_min_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 8)
 test_4 (_mm256_mask_min_round_ps, __m256, __m256, __mmask8, __m256, __m256, 8)
+test_4 (_mm256_mask_mul_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9)
+test_4 (_mm256_mask_mul_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9)
+test_4 (_mm256_mask_mul_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
 test_4x (_mm256_maskz_fixupimm_round_pd, __m256d, __mmask8, __m256d, __m256d, __m256i, 3, 8)
 test_4x (_mm256_maskz_fixupimm_round_ps, __m256, __mmask8, __m256, __m256, __m256i, 3, 8)
 test_4x (_mm256_mask_fixupimm_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256i, 3, 8)
 test_4x (_mm256_mask_fixupimm_round_ps, __m256, __m256, __mmask8, __m256, __m256i, 3, 8)
+test_4x (_mm256_mask_range_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 15, 8)
+test_4x (_mm256_mask_range_round_ps, __m256, __m256, __mmask8, __m256, __m256, 15, 8)
diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c b/gcc/testsuite/gcc.target/i386/sse-23.c
index e27cb2d5bd2..bb418a74d25 100644
--- a/gcc/testsuite/gcc.target/i386/sse-23.c
+++ b/gcc/testsuite/gcc.target/i386/sse-23.c
@@ -963,6 +963,11 @@
 #define __builtin_ia32_minpd256_mask_round(A, B, C, D, E) __builtin_ia32_minpd256_mask_round(A, B, C, D, 8)
 #define __builtin_ia32_minph256_mask_round(A, B, C, D, E) __builtin_ia32_minph256_mask_round(A, B, C, D, 8)
 #define __builtin_ia32_minps256_mask_round(A, B, C, D, E) __builtin_ia32_minps256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_mulpd256_mask_round(A, B, C, D, E) __builtin_ia32_mulpd256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_mulph256_mask_round(A, B, C, D, E) __builtin_ia32_mulph256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_mulps256_mask_round(A, B, C, D, E) __builtin_ia32_mulps256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_rangeps256_mask_round(A, B, C, D, E, F) __builtin_ia32_rangeps256_mask_round(A, B, 1, D, E, 8)
+#define __builtin_ia32_rangepd256_mask_round(A, B, C, D, E, F) __builtin_ia32_rangepd256_mask_round(A, B, 1, D, E, 8)
 
 #pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,sha,xsavec,xsaves,clflushopt,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,vpclmulqdq,pconfig,wbnoinvd,enqcmd,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avxifma,avxvnniint8,avxneconvert,cmpccxadd,amx-fp16,prefetchi,raoint,amx-complex,avxvnniint16,sm3,sha512,sm4,avx10.2-512")
 
