Message ID | 20240808064747.9012-1-chenglulu@loongson.cn |
---|---|
State | New |
Headers | show |
Series | [v1,1/2] LoongArch: Drop vcond{,u} expanders. | expand |
Pushed to r15-2878. 在 2024/8/8 下午2:47, Lulu Cheng 写道: > Optabs vcond{,u} will be removed for GCC 15. Since regtest shows no > fallout, dropping the expanders, now. > > gcc/ChangeLog: > > PR target/114189 > * config/loongarch/lasx.md (vcondu<LASX:mode><ILASX:mode>): Delete. > (vcond<LASX:mode><LASX_2:mode>): Likewise. > * config/loongarch/lsx.md (vcondu<LSX:mode><ILSX:mode>): Likewise. > (vcond<LSX:mode><LSX_2:mode>): Likewise. > --- > gcc/config/loongarch/lasx.md | 37 ------------------------------------ > gcc/config/loongarch/lsx.md | 31 ------------------------------ > 2 files changed, 68 deletions(-) > > diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md > index 7bd61f8ed5b..4087c4b5349 100644 > --- a/gcc/config/loongarch/lasx.md > +++ b/gcc/config/loongarch/lasx.md > @@ -165,9 +165,6 @@ (define_c_enum "unspec" [ > ;; All vector modes with 256 bits. > (define_mode_iterator LASX [V4DF V8SF V4DI V8SI V16HI V32QI]) > > -;; Same as LASX. Used by vcond to iterate two modes. > -(define_mode_iterator LASX_2 [V4DF V8SF V4DI V8SI V16HI V32QI]) > - > ;; Only used for splitting insert_d and copy_{u,s}.d. > (define_mode_iterator LASX_D [V4DI V4DF]) > > @@ -762,40 +759,6 @@ (define_expand "vec_perm<mode>" > DONE; > }) > > -;; FIXME: 256?? > -(define_expand "vcondu<LASX:mode><ILASX:mode>" > - [(match_operand:LASX 0 "register_operand") > - (match_operand:LASX 1 "reg_or_m1_operand") > - (match_operand:LASX 2 "reg_or_0_operand") > - (match_operator 3 "" > - [(match_operand:ILASX 4 "register_operand") > - (match_operand:ILASX 5 "register_operand")])] > - "ISA_HAS_LASX > - && (GET_MODE_NUNITS (<LASX:MODE>mode) > - == GET_MODE_NUNITS (<ILASX:MODE>mode))" > -{ > - loongarch_expand_vec_cond_expr (<LASX:MODE>mode, <LASX:VIMODE256>mode, > - operands); > - DONE; > -}) > - > -;; FIXME: 256?? > -(define_expand "vcond<LASX:mode><LASX_2:mode>" > - [(match_operand:LASX 0 "register_operand") > - (match_operand:LASX 1 "reg_or_m1_operand") > - (match_operand:LASX 2 "reg_or_0_operand") > - (match_operator 3 "" > - [(match_operand:LASX_2 4 "register_operand") > - (match_operand:LASX_2 5 "register_operand")])] > - "ISA_HAS_LASX > - && (GET_MODE_NUNITS (<LASX:MODE>mode) > - == GET_MODE_NUNITS (<LASX_2:MODE>mode))" > -{ > - loongarch_expand_vec_cond_expr (<LASX:MODE>mode, <LASX:VIMODE256>mode, > - operands); > - DONE; > -}) > - > ;; Same as vcond_ > (define_expand "vcond_mask_<mode><mode256_i>" > [(match_operand:LASX 0 "register_operand") > diff --git a/gcc/config/loongarch/lsx.md b/gcc/config/loongarch/lsx.md > index 454cda47876..222a5afe5b2 100644 > --- a/gcc/config/loongarch/lsx.md > +++ b/gcc/config/loongarch/lsx.md > @@ -186,9 +186,6 @@ (define_mode_attr VD2MODE > ;; All vector modes with 128 bits. > (define_mode_iterator LSX [V2DF V4SF V2DI V4SI V8HI V16QI]) > > -;; Same as LSX. Used by vcond to iterate two modes. > -(define_mode_iterator LSX_2 [V2DF V4SF V2DI V4SI V8HI V16QI]) > - > ;; Only used for vilvh and splitting insert_d and copy_{u,s}.d. > (define_mode_iterator LSX_D [V2DI V2DF]) > > @@ -533,34 +530,6 @@ (define_expand "vec_cmpu<ILSX:mode><mode_i>" > DONE; > }) > > -(define_expand "vcondu<LSX:mode><ILSX:mode>" > - [(match_operand:LSX 0 "register_operand") > - (match_operand:LSX 1 "reg_or_m1_operand") > - (match_operand:LSX 2 "reg_or_0_operand") > - (match_operator 3 "" > - [(match_operand:ILSX 4 "register_operand") > - (match_operand:ILSX 5 "register_operand")])] > - "ISA_HAS_LSX > - && (GET_MODE_NUNITS (<LSX:MODE>mode) == GET_MODE_NUNITS (<ILSX:MODE>mode))" > -{ > - loongarch_expand_vec_cond_expr (<LSX:MODE>mode, <LSX:VIMODE>mode, operands); > - DONE; > -}) > - > -(define_expand "vcond<LSX:mode><LSX_2:mode>" > - [(match_operand:LSX 0 "register_operand") > - (match_operand:LSX 1 "reg_or_m1_operand") > - (match_operand:LSX 2 "reg_or_0_operand") > - (match_operator 3 "" > - [(match_operand:LSX_2 4 "register_operand") > - (match_operand:LSX_2 5 "register_operand")])] > - "ISA_HAS_LSX > - && (GET_MODE_NUNITS (<LSX:MODE>mode) == GET_MODE_NUNITS (<LSX_2:MODE>mode))" > -{ > - loongarch_expand_vec_cond_expr (<LSX:MODE>mode, <LSX:VIMODE>mode, operands); > - DONE; > -}) > - > (define_expand "vcond_mask_<mode><mode_i>" > [(match_operand:LSX 0 "register_operand") > (match_operand:LSX 1 "reg_or_m1_operand")
diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md index 7bd61f8ed5b..4087c4b5349 100644 --- a/gcc/config/loongarch/lasx.md +++ b/gcc/config/loongarch/lasx.md @@ -165,9 +165,6 @@ (define_c_enum "unspec" [ ;; All vector modes with 256 bits. (define_mode_iterator LASX [V4DF V8SF V4DI V8SI V16HI V32QI]) -;; Same as LASX. Used by vcond to iterate two modes. -(define_mode_iterator LASX_2 [V4DF V8SF V4DI V8SI V16HI V32QI]) - ;; Only used for splitting insert_d and copy_{u,s}.d. (define_mode_iterator LASX_D [V4DI V4DF]) @@ -762,40 +759,6 @@ (define_expand "vec_perm<mode>" DONE; }) -;; FIXME: 256?? -(define_expand "vcondu<LASX:mode><ILASX:mode>" - [(match_operand:LASX 0 "register_operand") - (match_operand:LASX 1 "reg_or_m1_operand") - (match_operand:LASX 2 "reg_or_0_operand") - (match_operator 3 "" - [(match_operand:ILASX 4 "register_operand") - (match_operand:ILASX 5 "register_operand")])] - "ISA_HAS_LASX - && (GET_MODE_NUNITS (<LASX:MODE>mode) - == GET_MODE_NUNITS (<ILASX:MODE>mode))" -{ - loongarch_expand_vec_cond_expr (<LASX:MODE>mode, <LASX:VIMODE256>mode, - operands); - DONE; -}) - -;; FIXME: 256?? -(define_expand "vcond<LASX:mode><LASX_2:mode>" - [(match_operand:LASX 0 "register_operand") - (match_operand:LASX 1 "reg_or_m1_operand") - (match_operand:LASX 2 "reg_or_0_operand") - (match_operator 3 "" - [(match_operand:LASX_2 4 "register_operand") - (match_operand:LASX_2 5 "register_operand")])] - "ISA_HAS_LASX - && (GET_MODE_NUNITS (<LASX:MODE>mode) - == GET_MODE_NUNITS (<LASX_2:MODE>mode))" -{ - loongarch_expand_vec_cond_expr (<LASX:MODE>mode, <LASX:VIMODE256>mode, - operands); - DONE; -}) - ;; Same as vcond_ (define_expand "vcond_mask_<mode><mode256_i>" [(match_operand:LASX 0 "register_operand") diff --git a/gcc/config/loongarch/lsx.md b/gcc/config/loongarch/lsx.md index 454cda47876..222a5afe5b2 100644 --- a/gcc/config/loongarch/lsx.md +++ b/gcc/config/loongarch/lsx.md @@ -186,9 +186,6 @@ (define_mode_attr VD2MODE ;; All vector modes with 128 bits. (define_mode_iterator LSX [V2DF V4SF V2DI V4SI V8HI V16QI]) -;; Same as LSX. Used by vcond to iterate two modes. -(define_mode_iterator LSX_2 [V2DF V4SF V2DI V4SI V8HI V16QI]) - ;; Only used for vilvh and splitting insert_d and copy_{u,s}.d. (define_mode_iterator LSX_D [V2DI V2DF]) @@ -533,34 +530,6 @@ (define_expand "vec_cmpu<ILSX:mode><mode_i>" DONE; }) -(define_expand "vcondu<LSX:mode><ILSX:mode>" - [(match_operand:LSX 0 "register_operand") - (match_operand:LSX 1 "reg_or_m1_operand") - (match_operand:LSX 2 "reg_or_0_operand") - (match_operator 3 "" - [(match_operand:ILSX 4 "register_operand") - (match_operand:ILSX 5 "register_operand")])] - "ISA_HAS_LSX - && (GET_MODE_NUNITS (<LSX:MODE>mode) == GET_MODE_NUNITS (<ILSX:MODE>mode))" -{ - loongarch_expand_vec_cond_expr (<LSX:MODE>mode, <LSX:VIMODE>mode, operands); - DONE; -}) - -(define_expand "vcond<LSX:mode><LSX_2:mode>" - [(match_operand:LSX 0 "register_operand") - (match_operand:LSX 1 "reg_or_m1_operand") - (match_operand:LSX 2 "reg_or_0_operand") - (match_operator 3 "" - [(match_operand:LSX_2 4 "register_operand") - (match_operand:LSX_2 5 "register_operand")])] - "ISA_HAS_LSX - && (GET_MODE_NUNITS (<LSX:MODE>mode) == GET_MODE_NUNITS (<LSX_2:MODE>mode))" -{ - loongarch_expand_vec_cond_expr (<LSX:MODE>mode, <LSX:VIMODE>mode, operands); - DONE; -}) - (define_expand "vcond_mask_<mode><mode_i>" [(match_operand:LSX 0 "register_operand") (match_operand:LSX 1 "reg_or_m1_operand")