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X-CSE-ConnectionGUID: vi5TsL3oQOiy3aKHBIGSzA== X-CSE-MsgGUID: WcmI1uLAQh6H24xF6Tea7Q== X-IronPort-AV: E=McAfee;i="6700,10204,11148"; a="37624031" X-IronPort-AV: E=Sophos;i="6.09,247,1716274800"; d="scan'208";a="37624031" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jul 2024 22:59:11 -0700 X-CSE-ConnectionGUID: PWDV6fHlSSOa03jkPceIZQ== X-CSE-MsgGUID: vW+CAYyARJiH31y5G2eFag== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,247,1716274800"; d="scan'208";a="59001200" Received: from shvmail02.sh.intel.com ([10.239.244.9]) by orviesa005.jf.intel.com with ESMTP; 29 Jul 2024 22:59:09 -0700 Received: from pli-ubuntu.sh.intel.com (pli-ubuntu.sh.intel.com [10.239.159.47]) by shvmail02.sh.intel.com (Postfix) with ESMTP id 4D77010056BA; Tue, 30 Jul 2024 13:59:08 +0800 (CST) From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, kito.cheng@gmail.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH v1] RISC-V: Take Xmode instead of Pmode for ussub expanding Date: Tue, 30 Jul 2024 13:59:06 +0800 Message-Id: <20240730055906.24790-1-pan2.li@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org From: Pan Li The Pmode is designed for pointer, thus leverage the Xmode instead for the expanding of the ussub. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_expand_ussub): Promote to Xmode instead of Pmode. Signed-off-by: Pan Li --- gcc/config/riscv/riscv.cc | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index a490b9598b0..8ece7859945 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -11620,26 +11620,26 @@ void riscv_expand_ussub (rtx dest, rtx x, rtx y) { machine_mode mode = GET_MODE (dest); - rtx pmode_x = gen_lowpart (Pmode, x); - rtx pmode_y = gen_lowpart (Pmode, y); - rtx pmode_lt = gen_reg_rtx (Pmode); - rtx pmode_minus = gen_reg_rtx (Pmode); - rtx pmode_dest = gen_reg_rtx (Pmode); + rtx xmode_x = gen_lowpart (Xmode, x); + rtx xmode_y = gen_lowpart (Xmode, y); + rtx xmode_lt = gen_reg_rtx (Xmode); + rtx xmode_minus = gen_reg_rtx (Xmode); + rtx xmode_dest = gen_reg_rtx (Xmode); /* Step-1: minus = x - y */ - riscv_emit_binary (MINUS, pmode_minus, pmode_x, pmode_y); + riscv_emit_binary (MINUS, xmode_minus, xmode_x, xmode_y); /* Step-2: lt = x < y */ - riscv_emit_binary (LTU, pmode_lt, pmode_x, pmode_y); + riscv_emit_binary (LTU, xmode_lt, xmode_x, xmode_y); /* Step-3: lt = lt - 1 (lt + (-1)) */ - riscv_emit_binary (PLUS, pmode_lt, pmode_lt, CONSTM1_RTX (Pmode)); + riscv_emit_binary (PLUS, xmode_lt, xmode_lt, CONSTM1_RTX (Xmode)); - /* Step-4: pmode_dest = minus & lt */ - riscv_emit_binary (AND, pmode_dest, pmode_lt, pmode_minus); + /* Step-4: xmode_dest = minus & lt */ + riscv_emit_binary (AND, xmode_dest, xmode_lt, xmode_minus); - /* Step-5: dest = pmode_dest */ - emit_move_insn (dest, gen_lowpart (mode, pmode_dest)); + /* Step-5: dest = xmode_dest */ + emit_move_insn (dest, gen_lowpart (mode, xmode_dest)); } /* Implement the unsigned saturation truncation for int mode.