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X-CSE-ConnectionGUID: 5rRc8VuEQT+NyQT8OhSNXw== X-CSE-MsgGUID: NtJvtCirQgi156X3QeMTDA== X-IronPort-AV: E=McAfee;i="6700,10204,11148"; a="19985673" X-IronPort-AV: E=Sophos;i="6.09,247,1716274800"; d="scan'208";a="19985673" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jul 2024 20:08:55 -0700 X-CSE-ConnectionGUID: yGRq1SS0R0KivTvU9u61oA== X-CSE-MsgGUID: vZ0gdOfxSNybkWNR7/jOWg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,247,1716274800"; d="scan'208";a="54248622" Received: from shvmail02.sh.intel.com ([10.239.244.9]) by fmviesa010.fm.intel.com with ESMTP; 29 Jul 2024 20:08:53 -0700 Received: from pli-ubuntu.sh.intel.com (pli-ubuntu.sh.intel.com [10.239.159.47]) by shvmail02.sh.intel.com (Postfix) with ESMTP id 889ED10056AF; Tue, 30 Jul 2024 11:08:51 +0800 (CST) From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, kito.cheng@gmail.com, richard.guenther@gmail.com, tamar.christina@arm.com, jeffreyalaw@gmail.com, rdapp.gcc@gmail.com, Pan Li Subject: [PATCH v2] Internal-fn: Handle vector bool type for type strict match mode [PR116103] Date: Tue, 30 Jul 2024 11:08:50 +0800 Message-Id: <20240730030850.3983878-1-pan2.li@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org From: Pan Li For some target like target=amdgcn-amdhsa, we need to take care of vector bool types prior to general vector mode types. Or we may have the asm check failure as below. gcc.target/gcn/cond_smax_1.c scan-assembler-times \\tv_cmp_gt_i32\\tvcc, s[0-9]+, v[0-9]+ 80 gcc.target/gcn/cond_smin_1.c scan-assembler-times \\tv_cmp_gt_i32\\tvcc, s[0-9]+, v[0-9]+ 80 gcc.target/gcn/cond_umax_1.c scan-assembler-times \\tv_cmp_gt_i32\\tvcc, s[0-9]+, v[0-9]+ 56 gcc.target/gcn/cond_umin_1.c scan-assembler-times \\tv_cmp_gt_i32\\tvcc, s[0-9]+, v[0-9]+ 56 gcc.dg/tree-ssa/loop-bound-2.c scan-tree-dump-not ivopts "zero if " The below test suites are passed for this patch. 1. The rv64gcv fully regression tests. 2. The x86 bootstrap tests. 3. The x86 fully regression tests. 4. The amdgcn test case as above. gcc/ChangeLog: * internal-fn.cc (type_strictly_matches_mode_p): Add handling for vector bool type. Signed-off-by: Pan Li --- gcc/internal-fn.cc | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/gcc/internal-fn.cc b/gcc/internal-fn.cc index 8a2e07f2f96..966594a52ed 100644 --- a/gcc/internal-fn.cc +++ b/gcc/internal-fn.cc @@ -4171,6 +4171,16 @@ direct_internal_fn_optab (internal_fn fn) static bool type_strictly_matches_mode_p (const_tree type) { + /* The masked vector operations have both vector data operands and vector + boolean operands. The vector data operands are expected to have a vector + mode, but the vector boolean operands can be an integer mode rather than + a vector mode, depending on how TARGET_VECTORIZE_GET_MASK_MODE is + defined. PR116103. */ + if (VECTOR_BOOLEAN_TYPE_P (type) + && SCALAR_INT_MODE_P (TYPE_MODE (type)) + && TYPE_PRECISION (TREE_TYPE (type)) == 1) + return true; + if (VECTOR_TYPE_P (type)) return VECTOR_MODE_P (TYPE_MODE (type));