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Fri, 26 Jul 2024 03:40:45 -0700 (PDT) Received: from helsinki-03.engr ([2a01:4f9:6b:2a47::2]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2f03cf0e38fsm4249731fa.4.2024.07.26.03.40.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jul 2024 03:40:44 -0700 (PDT) From: Manolis Tsamis To: gcc-patches@gcc.gnu.org Cc: Robin Dapp , Philipp Tomsich , Jiangning Liu , Richard Sandiford , Richard Biener , Jeff Law , Manolis Tsamis Subject: [RESEND PATCH v5 2/3] ifcvt: Allow more operations in multiple set if conversion Date: Fri, 26 Jul 2024 12:40:34 +0200 Message-Id: <20240726104035.4100769-3-manolis.tsamis@vrull.eu> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240726104035.4100769-1-manolis.tsamis@vrull.eu> References: <20240726104035.4100769-1-manolis.tsamis@vrull.eu> MIME-Version: 1.0 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Currently the operations allowed for if conversion of a basic block with multiple sets are few, namely REG, SUBREG and CONST_INT (as controlled by bb_ok_for_noce_convert_multiple_sets). This commit allows more operations (arithmetic, compare, etc) to participate in if conversion. The target's profitability hook and ifcvt's costing is expected to reject sequences that are unprofitable. This is especially useful for targets which provide a rich selection of conditional instructions (like aarch64 which has cinc, csneg, csinv, ccmp, ...) which are currently not used in basic blocks with more than a single set. gcc/ChangeLog: * ifcvt.cc (try_emit_cmove_seq): Modify comments. (noce_convert_multiple_sets_1): Modify comments. (bb_ok_for_noce_convert_multiple_sets): Allow more operations. gcc/testsuite/ChangeLog: * gcc.target/aarch64/ifcvt_multiple_sets_arithm.c: New test. Signed-off-by: Manolis Tsamis --- Changes in v5: - Loop over SEQ and check modified_in_p for all instructions. - Fix x86-related bug when SEQ modifies COND. gcc/ifcvt.cc | 34 +++----- .../aarch64/ifcvt_multiple_sets_arithm.c | 79 +++++++++++++++++++ 2 files changed, 92 insertions(+), 21 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_arithm.c diff --git a/gcc/ifcvt.cc b/gcc/ifcvt.cc index 58c34aaf1ee..f496a46e600 100644 --- a/gcc/ifcvt.cc +++ b/gcc/ifcvt.cc @@ -3432,13 +3432,13 @@ try_emit_cmove_seq (struct noce_if_info *if_info, rtx temp, /* We have something like: if (x > y) - { i = a; j = b; k = c; } + { i = EXPR_A; j = EXPR_B; k = EXPR_C; } Make it: - tmp_i = (x > y) ? a : i; - tmp_j = (x > y) ? b : j; - tmp_k = (x > y) ? c : k; + tmp_i = (x > y) ? EXPR_A : i; + tmp_j = (x > y) ? EXPR_B : j; + tmp_k = (x > y) ? EXPR_C : k; i = tmp_i; j = tmp_j; k = tmp_k; @@ -3858,11 +3858,10 @@ noce_convert_multiple_sets_1 (struct noce_if_info *if_info, -/* Return true iff basic block TEST_BB is comprised of only - (SET (REG) (REG)) insns suitable for conversion to a series - of conditional moves. Also check that we have more than one set - (other routines can handle a single set better than we would), and - fewer than PARAM_MAX_RTL_IF_CONVERSION_INSNS sets. While going +/* Return true iff basic block TEST_BB is suitable for conversion to a + series of conditional moves. Also check that we have more than one + set (other routines can handle a single set better than we would), + and fewer than PARAM_MAX_RTL_IF_CONVERSION_INSNS sets. While going through the insns store the sum of their potential costs in COST. */ static bool @@ -3888,20 +3887,13 @@ bb_ok_for_noce_convert_multiple_sets (basic_block test_bb, unsigned *cost) rtx dest = SET_DEST (set); rtx src = SET_SRC (set); - /* We can possibly relax this, but for now only handle REG to REG - (including subreg) moves. This avoids any issues that might come - from introducing loads/stores that might violate data-race-freedom - guarantees. */ - if (!REG_P (dest)) - return false; - - if (!((REG_P (src) || CONSTANT_P (src)) - || (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src)) - && subreg_lowpart_p (src)))) + /* Do not handle anything involving memory loads/stores since it might + violate data-race-freedom guarantees. */ + if (!REG_P (dest) || contains_mem_rtx_p (src)) return false; - /* Destination must be appropriate for a conditional write. */ - if (!noce_operand_ok (dest)) + /* Destination and source must be appropriate. */ + if (!noce_operand_ok (dest) || !noce_operand_ok (src)) return false; /* We must be able to conditionally move in this mode. */ diff --git a/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_arithm.c b/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_arithm.c new file mode 100644 index 00000000000..ba7f948aba5 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_arithm.c @@ -0,0 +1,79 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-rtl-ce1" } */ + +void sink2(int, int); +void sink3(int, int, int); + +void cond1(int cond, int x, int y) +{ + if (cond) + { + x = x << 4; + y = 1; + } + + sink2(x, y); +} + +void cond2(int cond, int x, int y) +{ + if (cond) + { + x++; + y++; + } + + sink2(x, y); +} + +void cond3(int cond, int x1, int x2, int x3) +{ + if (cond) + { + x1++; + x2++; + x3++; + } + + sink3(x1, x2, x3); +} + +void cond4(int cond, int x, int y) +{ + if (cond) + { + x += 2; + y += 3; + } + + sink2(x, y); +} + +void cond5(int cond, int x, int y, int r1, int r2) +{ + if (cond) + { + x = r1 + 2; + y = r2 - 34; + } + + sink2(x, y); +} + +void cond6(int cond, int x, int y) +{ + if (cond) + { + x = -x; + y = ~y; + } + + sink2(x, y); +} + +/* { dg-final { scan-assembler-times "cinc\t" 5 } } */ +/* { dg-final { scan-assembler-times "csneg\t" 1 } } */ +/* { dg-final { scan-assembler-times "csinv\t" 1 } } */ +/* { dg-final { scan-assembler "csel\t" } } */ + +/* { dg-final { scan-rtl-dump-times "if-conversion succeeded through noce_convert_multiple_sets" 6 "ce1" } } */