From patchwork Thu Jul 18 01:35:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 1961827 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=mP8aavFy; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WPb3y6GHyz1yY1 for ; Thu, 18 Jul 2024 11:35:58 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7D05E385DC1B for ; Thu, 18 Jul 2024 01:35:56 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by sourceware.org (Postfix) with ESMTPS id E0CBA3858CDA for ; Thu, 18 Jul 2024 01:35:31 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org E0CBA3858CDA Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org E0CBA3858CDA Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1721266534; cv=none; b=fZLW+KV3uY6S/Rsi2bvzuPKeGIbT2MD+Ig8diqab4ZJ8AXULcJbQYtkRZ5Zr4de3Wl5WkByi2EL0yGvzHE5GI48gib4i48vBYptvTGjvpo0gKtGyxLy8mcNgtRc7RQqkBGdu8p8VOBmAbrS05/9J3Doxqppy00tEc7tV7VRBRDs= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1721266534; c=relaxed/simple; bh=Mim9bnemUNU2Ldhab7DECiS9VcooXtor2k8qgbTTFgA=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=RFIluu2LG9+0U+d3Glj9lFTg7Qn/1QgWZMvU5lJ+6C7+gaE3ONaz3S0yBGo+D82H0n0FWNx7jfqLxITLYN47T8waRjgZta3cQUyTkYiOUJbIuO2A1hbBqWjarrJNP4aMJBJo4qeDXUOXtrw3gdlLyoyBpGuJnRNAZ4ssCdO4wos= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1721266532; x=1752802532; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Mim9bnemUNU2Ldhab7DECiS9VcooXtor2k8qgbTTFgA=; b=mP8aavFyr3bDJMrWNh1zJsmABId3+T3Yb8X+KEWiuHgtLphFaCFzll51 Te2F+TYtXY+Jmh/OdP5lcOoIkyko3f/TY+N85sXr02dht+OajRim9AQtw w1zU+2miogiIWhVjnYnmQVjtLMhixys/gxb22GQDELk4efiXByaJYVtyN oSYY3J0XPQSWWQKkppBqPqT8yDjWpJdNJ+fAasvZJJgcmHlgBqNVSUBTq vNrapixhmp1UBLv1f3ZkO0PRDTgED4wvdNsDxsfdgyfK2Z9g5SPAbLbLP 1bdgP9UOwlthE0WIaPNna5bj6f7LRDXqgAAyVSwRZBoyQFmuas+fT+j+1 Q==; X-CSE-ConnectionGUID: a2/woDywQqO3SbmMrfXedQ== X-CSE-MsgGUID: ZLHysG5UQv6X3rxdORlwdw== X-IronPort-AV: E=McAfee;i="6700,10204,11136"; a="36250333" X-IronPort-AV: E=Sophos;i="6.09,216,1716274800"; d="scan'208";a="36250333" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jul 2024 18:35:30 -0700 X-CSE-ConnectionGUID: sXDHC3UoR5uO7uA9liiZGg== X-CSE-MsgGUID: SanDFW9tTIqSdlm1RmWqkQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,216,1716274800"; d="scan'208";a="50544366" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmviesa009.fm.intel.com with ESMTP; 17 Jul 2024 18:35:29 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 0F9351007016; Thu, 18 Jul 2024 09:35:28 +0800 (CST) From: liuhongt To: gcc-patches@gcc.gnu.org Cc: crazylht@gmail.com, hjl.tools@gmail.com Subject: [PATCH v2] [x86][avx512] Optimize maskstore when mask is 0 or -1 in UNSPEC_MASKMOV Date: Thu, 18 Jul 2024 09:35:28 +0800 Message-Id: <20240718013528.1898612-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SCC_5_SHORT_WORD_LINES, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org > Also, in case the insn is deleted, do: > > emit_note (NOTE_INSN_DELETED); > > DONE; > > instead of leaving (const_int 0) in the stream. > > So, the above insn preparation statements should read: > > --cut here-- > if (constm1_operand (operands[2], mode)) > emit_move_insn (operands[0], operands[1]); > else > emit_note (NOTE_INSN_DELETED); > > DONE; > --cut here-- Changed. Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ok for trunk? gcc/ChangeLog: PR target/115843 * config/i386/predicates.md (const0_or_m1_operand): New predicate. * config/i386/sse.md (*_store_mask_1): New pre_reload define_insn_and_split. (V): Add V32BF,V16BF,V8BF. (V4SF_V8BF): Rename to .. (V24F_128): .. this. (*vec_concat): Adjust with V24F_128. (*vec_concat_0): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/pr115843.c: New test. --- gcc/config/i386/predicates.md | 5 ++++ gcc/config/i386/sse.md | 33 ++++++++++++++++---- gcc/testsuite/gcc.target/i386/pr115843.c | 38 ++++++++++++++++++++++++ 3 files changed, 70 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr115843.c diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index 5d0bb1e0f54..680594871de 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -825,6 +825,11 @@ (define_predicate "constm1_operand" (and (match_code "const_int") (match_test "op == constm1_rtx"))) +;; Match 0 or -1. +(define_predicate "const0_or_m1_operand" + (ior (match_operand 0 "const0_operand") + (match_operand 0 "constm1_operand"))) + ;; Match exactly eight. (define_predicate "const8_operand" (and (match_code "const_int") diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index e44822f705b..f54e966bdbb 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -294,6 +294,7 @@ (define_mode_iterator V (V16SI "TARGET_AVX512F && TARGET_EVEX512") (V8SI "TARGET_AVX") V4SI (V8DI "TARGET_AVX512F && TARGET_EVEX512") (V4DI "TARGET_AVX") V2DI (V32HF "TARGET_AVX512F && TARGET_EVEX512") (V16HF "TARGET_AVX") V8HF + (V32BF "TARGET_AVX512F && TARGET_EVEX512") (V16BF "TARGET_AVX") V8BF (V16SF "TARGET_AVX512F && TARGET_EVEX512") (V8SF "TARGET_AVX") V4SF (V8DF "TARGET_AVX512F && TARGET_EVEX512") (V4DF "TARGET_AVX") (V2DF "TARGET_SSE2")]) @@ -430,8 +431,8 @@ (define_mode_iterator VFB_512 (V16SF "TARGET_EVEX512") (V8DF "TARGET_EVEX512")]) -(define_mode_iterator V4SF_V8HF - [V4SF V8HF]) +(define_mode_iterator V24F_128 + [V4SF V8HF V8BF]) (define_mode_iterator VI48_AVX512VL [(V16SI "TARGET_EVEX512") (V8SI "TARGET_AVX512VL") (V4SI "TARGET_AVX512VL") @@ -11543,8 +11544,8 @@ (define_insn "*vec_concatv2sf_sse" (set_attr "mode" "V4SF,SF,DI,DI")]) (define_insn "*vec_concat" - [(set (match_operand:V4SF_V8HF 0 "register_operand" "=x,v,x,v") - (vec_concat:V4SF_V8HF + [(set (match_operand:V24F_128 0 "register_operand" "=x,v,x,v") + (vec_concat:V24F_128 (match_operand: 1 "register_operand" " 0,v,0,v") (match_operand: 2 "nonimmediate_operand" " x,v,m,m")))] "TARGET_SSE" @@ -11559,8 +11560,8 @@ (define_insn "*vec_concat" (set_attr "mode" "V4SF,V4SF,V2SF,V2SF")]) (define_insn "*vec_concat_0" - [(set (match_operand:V4SF_V8HF 0 "register_operand" "=v") - (vec_concat:V4SF_V8HF + [(set (match_operand:V24F_128 0 "register_operand" "=v") + (vec_concat:V24F_128 (match_operand: 1 "nonimmediate_operand" "vm") (match_operand: 2 "const0_operand")))] "TARGET_SSE2" @@ -28574,6 +28575,26 @@ (define_insn "_store_mask" (set_attr "memory" "store") (set_attr "mode" "")]) +(define_insn_and_split "*_store_mask_1" + [(set (match_operand:V 0 "memory_operand") + (unspec:V + [(match_operand:V 1 "register_operand") + (match_dup 0) + (match_operand: 2 "const0_or_m1_operand")] + UNSPEC_MASKMOV))] + "TARGET_AVX512F && ix86_pre_reload_split ()" + "#" + "&& 1" + [(const_int 0)] +{ + if (constm1_operand (operands[2], mode)) + emit_move_insn (operands[0], operands[1]); + else + emit_note (NOTE_INSN_DELETED); + + DONE; +}) + (define_expand "cbranch4" [(set (reg:CC FLAGS_REG) (compare:CC (match_operand:VI_AVX_AVX512F 1 "register_operand") diff --git a/gcc/testsuite/gcc.target/i386/pr115843.c b/gcc/testsuite/gcc.target/i386/pr115843.c new file mode 100644 index 00000000000..00d8605757a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr115843.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -mavx512vl --param vect-partial-vector-usage=2 -mtune=znver5 -mprefer-vector-width=512" } */ +/* { dg-final { scan-assembler-not "kxor\[bw]" } } */ + +typedef unsigned long long BITBOARD; +BITBOARD KingPressureMask1[64], KingSafetyMask1[64]; + +void __attribute__((noinline)) +foo() +{ + int i; + + for (i = 0; i < 64; i++) { + if ((i & 7) == 0) { + KingPressureMask1[i] = KingSafetyMask1[i + 1]; + } else if ((i & 7) == 7) { + KingPressureMask1[i] = KingSafetyMask1[i - 1]; + } else { + KingPressureMask1[i] = KingSafetyMask1[i]; + } + } +} + +BITBOARD verify[64] = {1, 1, 2, 3, 4, 5, 6, 6, 9, 9, 10, 11, 12, 13, 14, 14, 17, 17, 18, 19, + 20, 21, 22, 22, 25, 25, 26, 27, 28, 29, 30, 30, 33, 33, 34, 35, 36, 37, 38, + 38, 41, 41, 42, 43, 44, 45, 46, 46, 49, 49, 50, 51, 52, 53, 54, 54, 57, 57, + 58, 59, 60, 61, 62, 62}; + +int main() +{ + for (int i = 0; i < 64; ++i) + KingSafetyMask1[i] = i; + foo (); + for (int i = 0; i < 64; ++i) + if (KingPressureMask1[i] != verify[i]) + __builtin_abort (); + return 0; +}