diff mbox series

RISC-V: Disable misaligned vector access in hook riscv_slow_unaligned_access

Message ID 20240711054535.17904-1-xuli1@eswincomputing.com
State New
Headers show
Series RISC-V: Disable misaligned vector access in hook riscv_slow_unaligned_access | expand

Commit Message

Li Xu July 11, 2024, 5:45 a.m. UTC 
From: xuli <xuli1@eswincomputing.com>

The reason is that in the following code, icode = movmisalignv8si has
already been rejected by TARGET_VECTOR_MISALIGN_SUPPORTED, but it is
allowed by targetm.slow_unaligned_access,which is contradictory.

(((icode = optab_handler (movmisalign_optab, mode))
	   != CODE_FOR_nothing)
	  || targetm.slow_unaligned_access (mode, align))

misaligned vector access should be enabled by -mno-vector-strict-align option.

PR Target/115862

gcc/ChangeLog:

        * config/riscv/riscv.cc (riscv_slow_unaligned_access): Disable vector misalign.

Signed-off-by: Li Xu <xuli1@eswincomputing.com>
---
 gcc/config/riscv/riscv.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Kito Cheng July 11, 2024, 6:57 a.m. UTC | #1 
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 61fa74e9322..87270fd7af4 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
> @@ -10271,7 +10271,7 @@ riscv_cannot_copy_insn_p (rtx_insn *insn)
>  static bool
>  riscv_slow_unaligned_access (machine_mode, unsigned int)
>  {
> -  return riscv_slow_unaligned_access_p;
> +  return !TARGET_VECTOR && riscv_slow_unaligned_access_p;

I guess this should be considered whether the mode is vector mode or
not, something like that?

return VECTOR_MODE_P (mode) ? TARGET_VECTOR_MISALIGN_SUPPORTED
 : riscv_slow_unaligned_access_p;

>  }
>
>  static bool
> --
> 2.17.1
>
diff mbox series

Patch

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 61fa74e9322..87270fd7af4 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -10271,7 +10271,7 @@  riscv_cannot_copy_insn_p (rtx_insn *insn)
 static bool
 riscv_slow_unaligned_access (machine_mode, unsigned int)
 {
-  return riscv_slow_unaligned_access_p;
+  return !TARGET_VECTOR && riscv_slow_unaligned_access_p;
 }
 
 static bool