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[1/2] LoongArch: TFmode is not allowed to be stored in the float register.

Message ID 20240704095624.10023-1-chenglulu@loongson.cn
State New
Headers show
Series [1/2] LoongArch: TFmode is not allowed to be stored in the float register. | expand

Commit Message

Lulu Cheng July 4, 2024, 9:56 a.m. UTC
PR target/115752

gcc/ChangeLog:

	* config/loongarch/loongarch.cc
	(loongarch_hard_regno_mode_ok_uncached): Replace
	UNITS_PER_FPVALUE with UNITS_PER_HWFPVALUE.
	* config/loongarch/loongarch.h (UNITS_PER_FPVALUE): Delete.

gcc/testsuite/ChangeLog:

	* gcc.target/loongarch/pr115752.c: New test.
---
 gcc/config/loongarch/loongarch.cc             | 2 +-
 gcc/config/loongarch/loongarch.h              | 7 -------
 gcc/testsuite/gcc.target/loongarch/pr115752.c | 8 ++++++++
 3 files changed, 9 insertions(+), 8 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/loongarch/pr115752.c

Comments

Lulu Cheng July 12, 2024, 2:27 a.m. UTC | #1
Pushed to r15-1986.

在 2024/7/4 下午5:56, Lulu Cheng 写道:
> 	PR target/115752
>
> gcc/ChangeLog:
>
> 	* config/loongarch/loongarch.cc
> 	(loongarch_hard_regno_mode_ok_uncached): Replace
> 	UNITS_PER_FPVALUE with UNITS_PER_HWFPVALUE.
> 	* config/loongarch/loongarch.h (UNITS_PER_FPVALUE): Delete.
>
> gcc/testsuite/ChangeLog:
>
> 	* gcc.target/loongarch/pr115752.c: New test.
> ---
>   gcc/config/loongarch/loongarch.cc             | 2 +-
>   gcc/config/loongarch/loongarch.h              | 7 -------
>   gcc/testsuite/gcc.target/loongarch/pr115752.c | 8 ++++++++
>   3 files changed, 9 insertions(+), 8 deletions(-)
>   create mode 100644 gcc/testsuite/gcc.target/loongarch/pr115752.c
>
> diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
> index e2ff2af89e2..803ed0575bd 100644
> --- a/gcc/config/loongarch/loongarch.cc
> +++ b/gcc/config/loongarch/loongarch.cc
> @@ -6705,7 +6705,7 @@ loongarch_hard_regno_mode_ok_uncached (unsigned int regno, machine_mode mode)
>         if (mclass == MODE_FLOAT
>   	  || mclass == MODE_COMPLEX_FLOAT
>   	  || mclass == MODE_VECTOR_FLOAT)
> -	return size <= UNITS_PER_FPVALUE;
> +	return size <= UNITS_PER_HWFPVALUE;
>   
>         /* Allow integer modes that fit into a single register.  We need
>   	 to put integers into FPRs when using instructions like CVT
> diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h
> index b9323aba394..5efeae53be6 100644
> --- a/gcc/config/loongarch/loongarch.h
> +++ b/gcc/config/loongarch/loongarch.h
> @@ -146,13 +146,6 @@ along with GCC; see the file COPYING3.  If not see
>   #define UNITS_PER_HWFPVALUE \
>     (TARGET_SOFT_FLOAT ? 0 : UNITS_PER_FP_REG)
>   
> -/* The largest size of value that can be held in floating-point
> -   registers.  */
> -#define UNITS_PER_FPVALUE \
> -  (TARGET_SOFT_FLOAT ? 0 \
> -   : TARGET_SINGLE_FLOAT ? UNITS_PER_FP_REG \
> -			 : LA_LONG_DOUBLE_TYPE_SIZE / BITS_PER_UNIT)
> -
>   /* The number of bytes in a double.  */
>   #define UNITS_PER_DOUBLE (TYPE_PRECISION (double_type_node) / BITS_PER_UNIT)
>   
> diff --git a/gcc/testsuite/gcc.target/loongarch/pr115752.c b/gcc/testsuite/gcc.target/loongarch/pr115752.c
> new file mode 100644
> index 00000000000..df4bae524f7
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/loongarch/pr115752.c
> @@ -0,0 +1,8 @@
> +/* { dg-do compile } */
> +
> +long double
> +test (long double xx)
> +{
> +   __asm ("" :: "f"(xx)); /* { dg-error "inconsistent operand constraints in an 'asm'" } */
> +   return xx + 1;
> +}
diff mbox series

Patch

diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
index e2ff2af89e2..803ed0575bd 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -6705,7 +6705,7 @@  loongarch_hard_regno_mode_ok_uncached (unsigned int regno, machine_mode mode)
       if (mclass == MODE_FLOAT
 	  || mclass == MODE_COMPLEX_FLOAT
 	  || mclass == MODE_VECTOR_FLOAT)
-	return size <= UNITS_PER_FPVALUE;
+	return size <= UNITS_PER_HWFPVALUE;
 
       /* Allow integer modes that fit into a single register.  We need
 	 to put integers into FPRs when using instructions like CVT
diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h
index b9323aba394..5efeae53be6 100644
--- a/gcc/config/loongarch/loongarch.h
+++ b/gcc/config/loongarch/loongarch.h
@@ -146,13 +146,6 @@  along with GCC; see the file COPYING3.  If not see
 #define UNITS_PER_HWFPVALUE \
   (TARGET_SOFT_FLOAT ? 0 : UNITS_PER_FP_REG)
 
-/* The largest size of value that can be held in floating-point
-   registers.  */
-#define UNITS_PER_FPVALUE \
-  (TARGET_SOFT_FLOAT ? 0 \
-   : TARGET_SINGLE_FLOAT ? UNITS_PER_FP_REG \
-			 : LA_LONG_DOUBLE_TYPE_SIZE / BITS_PER_UNIT)
-
 /* The number of bytes in a double.  */
 #define UNITS_PER_DOUBLE (TYPE_PRECISION (double_type_node) / BITS_PER_UNIT)
 
diff --git a/gcc/testsuite/gcc.target/loongarch/pr115752.c b/gcc/testsuite/gcc.target/loongarch/pr115752.c
new file mode 100644
index 00000000000..df4bae524f7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/pr115752.c
@@ -0,0 +1,8 @@ 
+/* { dg-do compile } */
+
+long double
+test (long double xx)
+{
+   __asm ("" :: "f"(xx)); /* { dg-error "inconsistent operand constraints in an 'asm'" } */
+   return xx + 1;
+}