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Mon, 1 Jul 2024 06:22:57 GMT Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 607CE20071; Mon, 1 Jul 2024 06:22:55 +0000 (GMT) Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E38D52006E; Mon, 1 Jul 2024 06:22:53 +0000 (GMT) Received: from genoa.aus.stglabs.ibm.com (unknown [9.40.192.157]) by smtpav01.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 1 Jul 2024 06:22:53 +0000 (GMT) From: Jiufu Guo To: gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, dje.gcc@gmail.com, linkw@gcc.gnu.org, bergner@linux.ibm.com, guojiufu@linux.ibm.com, pinskia@gcc.gnu.org, rguenther@suse.de, jeffreyalaw@gmail.com Subject: [PATCH V6 2/2] split complicate 64bit constant to memory for -m32 -mpowerpc64 Date: Mon, 1 Jul 2024 14:22:51 +0800 Message-Id: <20240701062251.3080507-2-guojiufu@linux.ibm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240701062251.3080507-1-guojiufu@linux.ibm.com> References: <20240701062251.3080507-1-guojiufu@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: jQJB6olxKg10krUZQ-Orrtm-lzKkZXXb X-Proofpoint-ORIG-GUID: xERX7Rv8BI4cN7Q75mi5pKaF_Lb-DB5d X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-01_05,2024-06-28_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 impostorscore=0 phishscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 adultscore=0 bulkscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2407010047 X-Spam-Status: No, score=-9.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, KAM_SHORT, KAM_STOCKGEN, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org Hi, For "-m32 -mpowerpc64", it is also ok to use fewer instruciton (p?ld) to loading 64bit constant from memory. So, splitting the complicate 64bit constant to constant pool should also work for this case. Compare with previous version: This version is using the new parameter to control what kind of complicate constanst should be put into memory. Bootstrap and regtest pass on ppc64{,le}. Also no regression for "-m32 -mpowerpc64" variation on ppc64. Is this ok for trunk? BR, Jeff(Jiufu) Guo gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_emit_set_const): Split constant to pool for "-m32 -mpowerpc64". gcc/testsuite/ChangeLog: * gcc.target/powerpc/pr63281.c: Allow checking -m32. --- gcc/config/rs6000/rs6000.cc | 21 +++++++++++++++++++-- gcc/testsuite/gcc.target/powerpc/pr63281.c | 2 +- 2 files changed, 20 insertions(+), 3 deletions(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index ec384e87868..c785fb20b1b 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -10245,8 +10245,7 @@ rs6000_emit_set_const (rtx dest, rtx source) after RA when reusing the DEST register to build the value. */ else if ((can_create_pseudo_p () || base_reg_operand (dest, mode)) && num_insns_constant (source, mode) - > rs6000_min_insns_constant_in_pool - && TARGET_64BIT) + > rs6000_min_insns_constant_in_pool) { rtx sym = force_const_mem (mode, source); if (TARGET_TOC && SYMBOL_REF_P (XEXP (sym, 0)) @@ -10256,6 +10255,24 @@ rs6000_emit_set_const (rtx dest, rtx source) sym = gen_const_mem (mode, toc); set_mem_alias_set (sym, get_TOC_alias_set ()); } + else if (TARGET_32BIT) + { + /* After RA, reuse 'DEST' reg. */ + rtx addr = can_create_pseudo_p () + ? gen_reg_rtx (Pmode) + : gen_rtx_REG (Pmode, REGNO (dest)); + rtx sym_ref = XEXP (sym, 0); + if (flag_pic) + emit_move_insn (addr, sym_ref); + else + { + emit_move_insn (addr, gen_rtx_HIGH (Pmode, sym_ref)); + emit_move_insn (addr, gen_rtx_LO_SUM (Pmode, addr, sym_ref)); + } + rtx mem = gen_rtx_MEM (mode, addr); + MEM_COPY_ATTRIBUTES (mem, sym); + sym = mem; + } emit_move_insn (dest, sym); } diff --git a/gcc/testsuite/gcc.target/powerpc/pr63281.c b/gcc/testsuite/gcc.target/powerpc/pr63281.c index 9763a7181fc..16a93b78606 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr63281.c +++ b/gcc/testsuite/gcc.target/powerpc/pr63281.c @@ -7,5 +7,5 @@ foo (unsigned long long *a) *a++ = 0x2351847027482577ULL; } -/* { dg-final { scan-assembler-times {\mp?ld\M} 1 { target { lp64 } } } } */ +/* { dg-final { scan-assembler-times {\mp?ld\M} 1 { target { has_arch_ppc64 } } } } */