diff mbox series

[7/7] Remove vcond{, u, eq}<mode> expanders since they will be obsolete.

Message ID 20240627082307.1166985-8-hongtao.liu@intel.com
State New
Headers show
Series Remove vcond{,u,eq}<mode> expanders. | expand

Commit Message

liuhongt June 27, 2024, 8:23 a.m. UTC
gcc/ChangeLog:

	PR target/115517
	* config/i386/mmx.md (vcond<mode>v2sf): Removed.
	(vcond<MMXMODE124:mode><MMXMODEI:mode>): Ditto.
	(vcond<mode><mode>): Ditto.
	(vcondu<MMXMODE124:mode><MMXMODEI:mode>): Ditto.
	(vcondu<mode><mode>): Ditto.
	* config/i386/sse.md (vcond<V_512:mode><VF_512:mode>): Ditto.
	(vcond<V_256:mode><VF_256:mode>): Ditto.
	(vcond<V_128:mode><VF_128:mode>): Ditto.
	(vcond<VI2HFBF_AVX512VL:mode><VHF_AVX512VL:mode>): Ditto.
	(vcond<V_512:mode><VI_AVX512BW:mode>): Ditto.
	(vcond<V_256:mode><VI_256:mode>): Ditto.
	(vcond<V_128:mode><VI124_128:mode>): Ditto.
	(vcond<VI8F_128:mode>v2di): Ditto.
	(vcondu<V_512:mode><VI_AVX512BW:mode>): Ditto.
	(vcondu<V_256:mode><VI_256:mode>): Ditto.
	(vcondu<V_128:mode><VI124_128:mode>): Ditto.
	(vcondu<VI8F_128:mode>v2di): Ditto.
	(vcondeq<VI8F_128:mode>v2di): Ditto.
---
 gcc/config/i386/mmx.md |  97 -------------------
 gcc/config/i386/sse.md | 213 -----------------------------------------
 2 files changed, 310 deletions(-)
diff mbox series

Patch

diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 7262bf146c2..17c5205cae2 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -1168,39 +1168,6 @@  (define_expand "vec_cmpv2sfv2si"
   DONE;
 })
 
-(define_expand "vcond<mode>v2sf"
-  [(set (match_operand:V2FI 0 "register_operand")
-	(if_then_else:V2FI
-	  (match_operator 3 ""
-	    [(match_operand:V2SF 4 "nonimmediate_operand")
-	     (match_operand:V2SF 5 "nonimmediate_operand")])
-	  (match_operand:V2FI 1 "general_operand")
-	  (match_operand:V2FI 2 "general_operand")))]
-  "TARGET_MMX_WITH_SSE && ix86_partial_vec_fp_math"
-{
-  rtx ops[6];
-  ops[5] = gen_reg_rtx (V4SFmode);
-  ops[4] = gen_reg_rtx (V4SFmode);
-  ops[3] = gen_rtx_fmt_ee (GET_CODE (operands[3]), VOIDmode, ops[4], ops[5]);
-  ops[2] = lowpart_subreg (<mmxdoublevecmode>mode,
-			   force_reg (<MODE>mode, operands[2]),
-			   <MODE>mode);
-  ops[1] = lowpart_subreg (<mmxdoublevecmode>mode,
-			   force_reg (<MODE>mode, operands[1]),
-			   <MODE>mode);
-  ops[0] = gen_reg_rtx (<mmxdoublevecmode>mode);
-
-  emit_insn (gen_movq_v2sf_to_sse (ops[5], operands[5]));
-  emit_insn (gen_movq_v2sf_to_sse (ops[4], operands[4]));
-
-  bool ok = ix86_expand_fp_vcond (ops);
-  gcc_assert (ok);
-
-  emit_move_insn (operands[0], lowpart_subreg (<MODE>mode, ops[0],
-					       <mmxdoublevecmode>mode));
-  DONE;
-})
-
 (define_insn "@sse4_1_insertps_<mode>"
   [(set (match_operand:V2FI 0 "register_operand" "=Yr,*x,v")
 	(unspec:V2FI
@@ -4029,70 +3996,6 @@  (define_expand "vec_cmpu<mode><mode>"
   DONE;
 })
 
-(define_expand "vcond<MMXMODE124:mode><MMXMODEI:mode>"
-  [(set (match_operand:MMXMODE124 0 "register_operand")
-	(if_then_else:MMXMODE124
-	  (match_operator 3 ""
-	    [(match_operand:MMXMODEI 4 "register_operand")
-	     (match_operand:MMXMODEI 5 "register_operand")])
-	  (match_operand:MMXMODE124 1)
-	  (match_operand:MMXMODE124 2)))]
-  "TARGET_MMX_WITH_SSE
-   && (GET_MODE_NUNITS (<MMXMODE124:MODE>mode)
-       == GET_MODE_NUNITS (<MMXMODEI:MODE>mode))"
-{
-  bool ok = ix86_expand_int_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
-(define_expand "vcond<mode><mode>"
-  [(set (match_operand:VI_16_32 0 "register_operand")
-	(if_then_else:VI_16_32
-	  (match_operator 3 ""
-	    [(match_operand:VI_16_32 4 "register_operand")
-	     (match_operand:VI_16_32 5 "register_operand")])
-	  (match_operand:VI_16_32 1)
-	  (match_operand:VI_16_32 2)))]
-  "TARGET_SSE2"
-{
-  bool ok = ix86_expand_int_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
-(define_expand "vcondu<MMXMODE124:mode><MMXMODEI:mode>"
-  [(set (match_operand:MMXMODE124 0 "register_operand")
-	(if_then_else:MMXMODE124
-	  (match_operator 3 ""
-	    [(match_operand:MMXMODEI 4 "register_operand")
-	     (match_operand:MMXMODEI 5 "register_operand")])
-	  (match_operand:MMXMODE124 1)
-	  (match_operand:MMXMODE124 2)))]
-  "TARGET_MMX_WITH_SSE
-   && (GET_MODE_NUNITS (<MMXMODE124:MODE>mode)
-       == GET_MODE_NUNITS (<MMXMODEI:MODE>mode))"
-{
-  bool ok = ix86_expand_int_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
-(define_expand "vcondu<mode><mode>"
-  [(set (match_operand:VI_16_32 0 "register_operand")
-	(if_then_else:VI_16_32
-	  (match_operator 3 ""
-	    [(match_operand:VI_16_32 4 "register_operand")
-	     (match_operand:VI_16_32 5 "register_operand")])
-	  (match_operand:VI_16_32 1)
-	  (match_operand:VI_16_32 2)))]
-  "TARGET_SSE2"
-{
-  bool ok = ix86_expand_int_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
 (define_expand "vcond_mask_<mode><mmxintvecmodelower>"
   [(set (match_operand:MMXMODE124 0 "register_operand")
 	(vec_merge:MMXMODE124
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index d86b6fa81c0..2d6b39c920f 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -4816,72 +4816,6 @@  (define_expand "vec_cmpeqv1tiv1ti"
   DONE;
 })
 
-(define_expand "vcond<V_512:mode><VF_512:mode>"
-  [(set (match_operand:V_512 0 "register_operand")
-	(if_then_else:V_512
-	  (match_operator 3 ""
-	    [(match_operand:VF_512 4 "nonimmediate_operand")
-	     (match_operand:VF_512 5 "nonimmediate_operand")])
-	  (match_operand:V_512 1 "general_operand")
-	  (match_operand:V_512 2 "general_operand")))]
-  "TARGET_AVX512F
-   && (GET_MODE_NUNITS (<V_512:MODE>mode)
-       == GET_MODE_NUNITS (<VF_512:MODE>mode))"
-{
-  bool ok = ix86_expand_fp_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
-(define_expand "vcond<V_256:mode><VF_256:mode>"
-  [(set (match_operand:V_256 0 "register_operand")
-	(if_then_else:V_256
-	  (match_operator 3 ""
-	    [(match_operand:VF_256 4 "nonimmediate_operand")
-	     (match_operand:VF_256 5 "nonimmediate_operand")])
-	  (match_operand:V_256 1 "general_operand")
-	  (match_operand:V_256 2 "general_operand")))]
-  "TARGET_AVX
-   && (GET_MODE_NUNITS (<V_256:MODE>mode)
-       == GET_MODE_NUNITS (<VF_256:MODE>mode))"
-{
-  bool ok = ix86_expand_fp_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
-(define_expand "vcond<V_128:mode><VF_128:mode>"
-  [(set (match_operand:V_128 0 "register_operand")
-	(if_then_else:V_128
-	  (match_operator 3 ""
-	    [(match_operand:VF_128 4 "vector_operand")
-	     (match_operand:VF_128 5 "vector_operand")])
-	  (match_operand:V_128 1 "general_operand")
-	  (match_operand:V_128 2 "general_operand")))]
-  "TARGET_SSE
-   && (GET_MODE_NUNITS (<V_128:MODE>mode)
-       == GET_MODE_NUNITS (<VF_128:MODE>mode))"
-{
-  bool ok = ix86_expand_fp_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
-(define_expand "vcond<VI2HFBF_AVX512VL:mode><VHF_AVX512VL:mode>"
-  [(set (match_operand:VI2HFBF_AVX512VL 0 "register_operand")
-	(if_then_else:VI2HFBF_AVX512VL
-	  (match_operator 3 ""
-	    [(match_operand:VHF_AVX512VL 4 "vector_operand")
-	     (match_operand:VHF_AVX512VL 5 "vector_operand")])
-	  (match_operand:VI2HFBF_AVX512VL 1 "general_operand")
-	  (match_operand:VI2HFBF_AVX512VL 2 "general_operand")))]
-  "TARGET_AVX512FP16"
-{
-  bool ok = ix86_expand_fp_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
 (define_expand "vcond_mask_<mode><avx512fmaskmodelower>"
   [(set (match_operand:V48_AVX512VL 0 "register_operand")
 	(vec_merge:V48_AVX512VL
@@ -18017,153 +17951,6 @@  (define_insn "*sse2_gt<mode>3"
    (set_attr "prefix" "orig,vex")
    (set_attr "mode" "TI")])
 
-(define_expand "vcond<V_512:mode><VI_AVX512BW:mode>"
-  [(set (match_operand:V_512 0 "register_operand")
-	(if_then_else:V_512
-	  (match_operator 3 ""
-	    [(match_operand:VI_AVX512BW 4 "nonimmediate_operand")
-	     (match_operand:VI_AVX512BW 5 "general_operand")])
-	  (match_operand:V_512 1)
-	  (match_operand:V_512 2)))]
-  "TARGET_AVX512F
-   && (GET_MODE_NUNITS (<V_512:MODE>mode)
-       == GET_MODE_NUNITS (<VI_AVX512BW:MODE>mode))"
-{
-  bool ok = ix86_expand_int_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
-(define_expand "vcond<V_256:mode><VI_256:mode>"
-  [(set (match_operand:V_256 0 "register_operand")
-	(if_then_else:V_256
-	  (match_operator 3 ""
-	    [(match_operand:VI_256 4 "nonimmediate_operand")
-	     (match_operand:VI_256 5 "general_operand")])
-	  (match_operand:V_256 1)
-	  (match_operand:V_256 2)))]
-  "TARGET_AVX2
-   && (GET_MODE_NUNITS (<V_256:MODE>mode)
-       == GET_MODE_NUNITS (<VI_256:MODE>mode))"
-{
-  bool ok = ix86_expand_int_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
-(define_expand "vcond<V_128:mode><VI124_128:mode>"
-  [(set (match_operand:V_128 0 "register_operand")
-	(if_then_else:V_128
-	  (match_operator 3 ""
-	    [(match_operand:VI124_128 4 "vector_operand")
-	     (match_operand:VI124_128 5 "general_operand")])
-	  (match_operand:V_128 1)
-	  (match_operand:V_128 2)))]
-  "TARGET_SSE2
-   && (GET_MODE_NUNITS (<V_128:MODE>mode)
-       == GET_MODE_NUNITS (<VI124_128:MODE>mode))"
-{
-  bool ok = ix86_expand_int_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
-(define_expand "vcond<VI8F_128:mode>v2di"
-  [(set (match_operand:VI8F_128 0 "register_operand")
-	(if_then_else:VI8F_128
-	  (match_operator 3 ""
-	    [(match_operand:V2DI 4 "vector_operand")
-	     (match_operand:V2DI 5 "general_operand")])
-	  (match_operand:VI8F_128 1)
-	  (match_operand:VI8F_128 2)))]
-  "TARGET_SSE4_2"
-{
-  bool ok = ix86_expand_int_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
-(define_expand "vcondu<V_512:mode><VI_AVX512BW:mode>"
-  [(set (match_operand:V_512 0 "register_operand")
-	(if_then_else:V_512
-	  (match_operator 3 ""
-	    [(match_operand:VI_AVX512BW 4 "nonimmediate_operand")
-	     (match_operand:VI_AVX512BW 5 "nonimmediate_operand")])
-	  (match_operand:V_512 1 "general_operand")
-	  (match_operand:V_512 2 "general_operand")))]
-  "TARGET_AVX512F
-   && (GET_MODE_NUNITS (<V_512:MODE>mode)
-       == GET_MODE_NUNITS (<VI_AVX512BW:MODE>mode))"
-{
-  bool ok = ix86_expand_int_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
-(define_expand "vcondu<V_256:mode><VI_256:mode>"
-  [(set (match_operand:V_256 0 "register_operand")
-	(if_then_else:V_256
-	  (match_operator 3 ""
-	    [(match_operand:VI_256 4 "nonimmediate_operand")
-	     (match_operand:VI_256 5 "nonimmediate_operand")])
-	  (match_operand:V_256 1 "general_operand")
-	  (match_operand:V_256 2 "general_operand")))]
-  "TARGET_AVX2
-   && (GET_MODE_NUNITS (<V_256:MODE>mode)
-       == GET_MODE_NUNITS (<VI_256:MODE>mode))"
-{
-  bool ok = ix86_expand_int_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
-(define_expand "vcondu<V_128:mode><VI124_128:mode>"
-  [(set (match_operand:V_128 0 "register_operand")
-	(if_then_else:V_128
-	  (match_operator 3 ""
-	    [(match_operand:VI124_128 4 "vector_operand")
-	     (match_operand:VI124_128 5 "vector_operand")])
-	  (match_operand:V_128 1 "general_operand")
-	  (match_operand:V_128 2 "general_operand")))]
-  "TARGET_SSE2
-   && (GET_MODE_NUNITS (<V_128:MODE>mode)
-       == GET_MODE_NUNITS (<VI124_128:MODE>mode))"
-{
-  bool ok = ix86_expand_int_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
-(define_expand "vcondu<VI8F_128:mode>v2di"
-  [(set (match_operand:VI8F_128 0 "register_operand")
-	(if_then_else:VI8F_128
-	  (match_operator 3 ""
-	    [(match_operand:V2DI 4 "vector_operand")
-	     (match_operand:V2DI 5 "vector_operand")])
-	  (match_operand:VI8F_128 1 "general_operand")
-	  (match_operand:VI8F_128 2 "general_operand")))]
-  "TARGET_SSE4_2"
-{
-  bool ok = ix86_expand_int_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
-(define_expand "vcondeq<VI8F_128:mode>v2di"
-  [(set (match_operand:VI8F_128 0 "register_operand")
-	(if_then_else:VI8F_128
-	  (match_operator 3 ""
-	    [(match_operand:V2DI 4 "vector_operand")
-	     (match_operand:V2DI 5 "general_operand")])
-	  (match_operand:VI8F_128 1)
-	  (match_operand:VI8F_128 2)))]
-  "TARGET_SSE4_1"
-{
-  bool ok = ix86_expand_int_vcond (operands);
-  gcc_assert (ok);
-  DONE;
-})
-
 (define_mode_iterator VEC_PERM_AVX2
   [V16QI V8HI V4SI V2DI V4SF V2DF
    (V8HF "TARGET_AVX512FP16")