diff mbox series

[V2] Fix wrong cost of MEM when addr is a lea.

Message ID 20240627035635.354866-1-hongtao.liu@intel.com
State New
Headers show
Series [V2] Fix wrong cost of MEM when addr is a lea. | expand

Commit Message

liuhongt June 27, 2024, 3:56 a.m. UTC 
> But rtx_cost invokes targetm.rtx_cost which allows to avoid that
> recursive processing at any level.  You're dealing with MEM [addr]
> here, so why's rtx_cost (addr, Pmode, MEM, 0, speed) not always
> the best way to deal with this?  Since this is the MEM [addr] case
> we know it's not LEA, no?
The patch restrict MEM rtx_cost reduction only for register_operand + disp.


Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
Ok for trunk?


416.gamess regressed 4-6% on x86_64 since my r15-882-g1d6199e5f8c1c0.
The commit adjust rtx_cost of mem to reduce cost of (add op0 disp).
But Cost of ADDR could be cheaper than XEXP (addr, 0) when it's a lea.
It is the case in the PR, the patch adjust rtx_cost to only handle reg
+ disp, for other forms, they're basically all LEA which doesn't have
additional cost of ADD.

gcc/ChangeLog:

	PR target/115462
	* config/i386/i386.cc (ix86_rtx_costs): Make cost of MEM (reg +
	disp) just a little bit more than MEM (reg).

gcc/testsuite/ChangeLog:
	* gcc.target/i386/pr115462.c: New test.
---
 gcc/config/i386/i386.cc                  |  5 ++++-
 gcc/testsuite/gcc.target/i386/pr115462.c | 22 ++++++++++++++++++++++
 2 files changed, 26 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr115462.c

Comments

Richard Biener June 27, 2024, 6:06 a.m. UTC | #1 
On Thu, Jun 27, 2024 at 5:57 AM liuhongt <hongtao.liu@intel.com> wrote:
>
> > But rtx_cost invokes targetm.rtx_cost which allows to avoid that
> > recursive processing at any level.  You're dealing with MEM [addr]
> > here, so why's rtx_cost (addr, Pmode, MEM, 0, speed) not always
> > the best way to deal with this?  Since this is the MEM [addr] case
> > we know it's not LEA, no?
> The patch restrict MEM rtx_cost reduction only for register_operand + disp.
>
>
> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> Ok for trunk?

Looks good from my side, I'll leave approval to x86 maintainers though.

Thanks,
Richard.

>
> 416.gamess regressed 4-6% on x86_64 since my r15-882-g1d6199e5f8c1c0.
> The commit adjust rtx_cost of mem to reduce cost of (add op0 disp).
> But Cost of ADDR could be cheaper than XEXP (addr, 0) when it's a lea.
> It is the case in the PR, the patch adjust rtx_cost to only handle reg
> + disp, for other forms, they're basically all LEA which doesn't have
> additional cost of ADD.
>
> gcc/ChangeLog:
>
>         PR target/115462
>         * config/i386/i386.cc (ix86_rtx_costs): Make cost of MEM (reg +
>         disp) just a little bit more than MEM (reg).
>
> gcc/testsuite/ChangeLog:
>         * gcc.target/i386/pr115462.c: New test.
> ---
>  gcc/config/i386/i386.cc                  |  5 ++++-
>  gcc/testsuite/gcc.target/i386/pr115462.c | 22 ++++++++++++++++++++++
>  2 files changed, 26 insertions(+), 1 deletion(-)
>  create mode 100644 gcc/testsuite/gcc.target/i386/pr115462.c
>
> diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
> index d4ccc24be6e..ef2a1e4f4f2 100644
> --- a/gcc/config/i386/i386.cc
> +++ b/gcc/config/i386/i386.cc
> @@ -22339,7 +22339,10 @@ ix86_rtx_costs (rtx x, machine_mode mode, int outer_code_i, int opno,
>              address_cost should be used, but it reduce cost too much.
>              So current solution is make constant disp as cheap as possible.  */
>           if (GET_CODE (addr) == PLUS
> -             && x86_64_immediate_operand (XEXP (addr, 1), Pmode))
> +             && x86_64_immediate_operand (XEXP (addr, 1), Pmode)
> +             /* Only hanlde (reg + disp) since other forms of addr are mostly LEA,
> +                there's no additional cost for the plus of disp.  */
> +             && register_operand (XEXP (addr, 0), Pmode))
>             {
>               *total += 1;
>               *total += rtx_cost (XEXP (addr, 0), Pmode, PLUS, 0, speed);
> diff --git a/gcc/testsuite/gcc.target/i386/pr115462.c b/gcc/testsuite/gcc.target/i386/pr115462.c
> new file mode 100644
> index 00000000000..ad50a6382bc
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr115462.c
> @@ -0,0 +1,22 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -mavx2 -fno-tree-vectorize -fno-pic" } */
> +/* { dg-final { scan-assembler-times {(?n)movl[ \t]+.*, p1\.0\+[0-9]*\(,} 3 } } */
> +
> +int
> +foo (long indx, long indx2, long indx3, long indx4, long indx5, long indx6, long n, int* q)
> +{
> +  static int p1[10000];
> +  int* p2 = p1 + 1000;
> +  int* p3 = p1 + 4000;
> +  int* p4 = p1 + 8000;
> +
> +  for (long i = 0; i != n; i++)
> +    {
> +      /* scan for      movl    %edi, p1.0+3996(,%rax,4),
> +        p1.0+3996 should be propagted into the loop.  */
> +      p2[indx++] = q[indx++];
> +      p3[indx2++] = q[indx2++];
> +      p4[indx3++] = q[indx3++];
> +    }
> +  return p1[indx6] + p1[indx5];
> +}
> --
> 2.31.1
>
Uros Bizjak June 27, 2024, 6:10 a.m. UTC | #2 
On Thu, Jun 27, 2024 at 5:57 AM liuhongt <hongtao.liu@intel.com> wrote:
>
> > But rtx_cost invokes targetm.rtx_cost which allows to avoid that
> > recursive processing at any level.  You're dealing with MEM [addr]
> > here, so why's rtx_cost (addr, Pmode, MEM, 0, speed) not always
> > the best way to deal with this?  Since this is the MEM [addr] case
> > we know it's not LEA, no?
> The patch restrict MEM rtx_cost reduction only for register_operand + disp.
>
>
> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> Ok for trunk?

LGTM.

Thanks,
Uros.

>
>
> 416.gamess regressed 4-6% on x86_64 since my r15-882-g1d6199e5f8c1c0.
> The commit adjust rtx_cost of mem to reduce cost of (add op0 disp).
> But Cost of ADDR could be cheaper than XEXP (addr, 0) when it's a lea.
> It is the case in the PR, the patch adjust rtx_cost to only handle reg
> + disp, for other forms, they're basically all LEA which doesn't have
> additional cost of ADD.
>
> gcc/ChangeLog:
>
>         PR target/115462
>         * config/i386/i386.cc (ix86_rtx_costs): Make cost of MEM (reg +
>         disp) just a little bit more than MEM (reg).
>
> gcc/testsuite/ChangeLog:
>         * gcc.target/i386/pr115462.c: New test.
> ---
>  gcc/config/i386/i386.cc                  |  5 ++++-
>  gcc/testsuite/gcc.target/i386/pr115462.c | 22 ++++++++++++++++++++++
>  2 files changed, 26 insertions(+), 1 deletion(-)
>  create mode 100644 gcc/testsuite/gcc.target/i386/pr115462.c
>
> diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
> index d4ccc24be6e..ef2a1e4f4f2 100644
> --- a/gcc/config/i386/i386.cc
> +++ b/gcc/config/i386/i386.cc
> @@ -22339,7 +22339,10 @@ ix86_rtx_costs (rtx x, machine_mode mode, int outer_code_i, int opno,
>              address_cost should be used, but it reduce cost too much.
>              So current solution is make constant disp as cheap as possible.  */
>           if (GET_CODE (addr) == PLUS
> -             && x86_64_immediate_operand (XEXP (addr, 1), Pmode))
> +             && x86_64_immediate_operand (XEXP (addr, 1), Pmode)
> +             /* Only hanlde (reg + disp) since other forms of addr are mostly LEA,
> +                there's no additional cost for the plus of disp.  */
> +             && register_operand (XEXP (addr, 0), Pmode))
>             {
>               *total += 1;
>               *total += rtx_cost (XEXP (addr, 0), Pmode, PLUS, 0, speed);
> diff --git a/gcc/testsuite/gcc.target/i386/pr115462.c b/gcc/testsuite/gcc.target/i386/pr115462.c
> new file mode 100644
> index 00000000000..ad50a6382bc
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr115462.c
> @@ -0,0 +1,22 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -mavx2 -fno-tree-vectorize -fno-pic" } */
> +/* { dg-final { scan-assembler-times {(?n)movl[ \t]+.*, p1\.0\+[0-9]*\(,} 3 } } */
> +
> +int
> +foo (long indx, long indx2, long indx3, long indx4, long indx5, long indx6, long n, int* q)
> +{
> +  static int p1[10000];
> +  int* p2 = p1 + 1000;
> +  int* p3 = p1 + 4000;
> +  int* p4 = p1 + 8000;
> +
> +  for (long i = 0; i != n; i++)
> +    {
> +      /* scan for      movl    %edi, p1.0+3996(,%rax,4),
> +        p1.0+3996 should be propagted into the loop.  */
> +      p2[indx++] = q[indx++];
> +      p3[indx2++] = q[indx2++];
> +      p4[indx3++] = q[indx3++];
> +    }
> +  return p1[indx6] + p1[indx5];
> +}
> --
> 2.31.1
>
diff mbox series

Patch

diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index d4ccc24be6e..ef2a1e4f4f2 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -22339,7 +22339,10 @@  ix86_rtx_costs (rtx x, machine_mode mode, int outer_code_i, int opno,
 	     address_cost should be used, but it reduce cost too much.
 	     So current solution is make constant disp as cheap as possible.  */
 	  if (GET_CODE (addr) == PLUS
-	      && x86_64_immediate_operand (XEXP (addr, 1), Pmode))
+	      && x86_64_immediate_operand (XEXP (addr, 1), Pmode)
+	      /* Only hanlde (reg + disp) since other forms of addr are mostly LEA,
+		 there's no additional cost for the plus of disp.  */
+	      && register_operand (XEXP (addr, 0), Pmode))
 	    {
 	      *total += 1;
 	      *total += rtx_cost (XEXP (addr, 0), Pmode, PLUS, 0, speed);
diff --git a/gcc/testsuite/gcc.target/i386/pr115462.c b/gcc/testsuite/gcc.target/i386/pr115462.c
new file mode 100644
index 00000000000..ad50a6382bc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr115462.c
@@ -0,0 +1,22 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx2 -fno-tree-vectorize -fno-pic" } */
+/* { dg-final { scan-assembler-times {(?n)movl[ \t]+.*, p1\.0\+[0-9]*\(,} 3 } } */
+
+int
+foo (long indx, long indx2, long indx3, long indx4, long indx5, long indx6, long n, int* q)
+{
+  static int p1[10000];
+  int* p2 = p1 + 1000;
+  int* p3 = p1 + 4000;
+  int* p4 = p1 + 8000;
+
+  for (long i = 0; i != n; i++)
+    {
+      /* scan for 	movl	%edi, p1.0+3996(,%rax,4),
+	 p1.0+3996 should be propagted into the loop.  */
+      p2[indx++] = q[indx++];
+      p3[indx2++] = q[indx2++];
+      p4[indx3++] = q[indx3++];
+    }
+  return p1[indx6] + p1[indx5];
+}