From patchwork Thu Jun 20 13:34:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 1950179 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4W4hNQ54gbz20Wb for ; Thu, 20 Jun 2024 23:36:38 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5970838930E0 for ; Thu, 20 Jun 2024 13:36:36 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 64C6F38930F5 for ; Thu, 20 Jun 2024 13:35:06 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 64C6F38930F5 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 64C6F38930F5 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1718890508; cv=none; b=gsbDwO0zs4CWEkJE8RHXv6n2/+miaScyo0olyKqyT41vor+Vo56XmeXAuD7iae6he8kRtSSXYnAwwn+ZgtO7fUAY2iBwu5z4Y4NdMhZDri0zi+PkN2LgxUbsUfF/ig4n32tfhrnu/8sr186af6n1W28L47ashSu9sOI0S4ppWgk= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1718890508; c=relaxed/simple; bh=z6PDsCwsfhIQYwdLmNKD03DDEcVyJljGZDDpFg3Mmq4=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=fmDmoBNe9s4NGotcD/5mrr+G+oo4gZb9OKv1I44nqJahO9VN0RiDNGKfMtuT5mKATq5+zI/htfQD47c4Tu0Le0i6ZHi39Noh4eZphbnCbTW1OQ9Y6dkxR0GbINiJhmqb4ae7st5FAbgjZMD+nDjCzn7Hy9vwzVjsleeVX05T4UI= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DC762DA7; Thu, 20 Jun 2024 06:35:29 -0700 (PDT) Received: from e121540-lin.manchester.arm.com (e121540-lin.manchester.arm.com [10.32.110.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 96CA53F73B; Thu, 20 Jun 2024 06:35:04 -0700 (PDT) From: Richard Sandiford To: jlaw@ventanamicro.com, gcc-patches@gcc.gnu.org Cc: Richard Sandiford Subject: [PATCH 3/6] iq2000: Fix test and branch instructions Date: Thu, 20 Jun 2024 14:34:15 +0100 Message-Id: <20240620133418.350772-4-richard.sandiford@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240620133418.350772-1-richard.sandiford@arm.com> References: <20240620133418.350772-1-richard.sandiford@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-20.0 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org The iq2000 test and branch instructions had patterns like: [(set (pc) (if_then_else (eq (and:SI (match_operand:SI 0 "register_operand" "r") (match_operand:SI 1 "power_of_2_operand" "I")) (const_int 0)) (match_operand 2 "pc_or_label_operand" "") (match_operand 3 "pc_or_label_operand" "")))] power_of_2_operand allows any 32-bit power of 2, whereas "I" only accepts 16-bit signed constants. This meant that any power of 2 greater than 32768 would cause an "insn does not satisfy its constraints" ICE. Also, the %p operand modifier barfed on 1<<31, which is sign- rather than zero-extended to 64 bits. The code is inherently limited to 32-bit operands -- power_of_2_operand contains a test involving "unsigned" -- so this patch just ands with 0xffffffff. gcc/ * config/iq2000/iq2000.cc (iq2000_print_operand): Make %p handle 1<<31. * config/iq2000/iq2000.md: Remove "I" constraints on power_of_2_operands. --- gcc/config/iq2000/iq2000.cc | 2 +- gcc/config/iq2000/iq2000.md | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/gcc/config/iq2000/iq2000.cc b/gcc/config/iq2000/iq2000.cc index f9f8c417841..136675d0fbb 100644 --- a/gcc/config/iq2000/iq2000.cc +++ b/gcc/config/iq2000/iq2000.cc @@ -3127,7 +3127,7 @@ iq2000_print_operand (FILE *file, rtx op, int letter) { int value; if (code != CONST_INT - || (value = exact_log2 (INTVAL (op))) < 0) + || (value = exact_log2 (UINTVAL (op) & 0xffffffff)) < 0) output_operand_lossage ("invalid %%p value"); else fprintf (file, "%d", value); diff --git a/gcc/config/iq2000/iq2000.md b/gcc/config/iq2000/iq2000.md index 8617efac3c6..e62c250ce8c 100644 --- a/gcc/config/iq2000/iq2000.md +++ b/gcc/config/iq2000/iq2000.md @@ -1175,7 +1175,7 @@ (define_insn "" [(set (pc) (if_then_else (eq (and:SI (match_operand:SI 0 "register_operand" "r") - (match_operand:SI 1 "power_of_2_operand" "I")) + (match_operand:SI 1 "power_of_2_operand")) (const_int 0)) (match_operand 2 "pc_or_label_operand" "") (match_operand 3 "pc_or_label_operand" "")))] @@ -1189,7 +1189,7 @@ (define_insn "" [(set (pc) (if_then_else (ne (and:SI (match_operand:SI 0 "register_operand" "r") - (match_operand:SI 1 "power_of_2_operand" "I")) + (match_operand:SI 1 "power_of_2_operand")) (const_int 0)) (match_operand 2 "pc_or_label_operand" "") (match_operand 3 "pc_or_label_operand" "")))]