diff mbox series

[8/8] aarch64: Add some uses of force_highpart_subreg

Message ID 20240617095336.871176-9-richard.sandiford@arm.com
State New
Headers show
Series [1/8] Make force_subreg emit nothing on failure | expand

Commit Message

Richard Sandiford June 17, 2024, 9:53 a.m. UTC 
This patch adds uses of force_highpart_subreg to places that
already use force_lowpart_subreg.

gcc/
	* config/aarch64/aarch64.cc (aarch64_addti_scratch_regs): Use
	force_highpart_subreg instead of gen_highpart and simplify_gen_subreg.
	(aarch64_subvti_scratch_regs): Likewise.
---
 gcc/config/aarch64/aarch64.cc | 17 ++++-------------
 1 file changed, 4 insertions(+), 13 deletions(-)
diff mbox series

Patch

diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index c952a7cdefe..026f8627a89 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -26873,19 +26873,12 @@  aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
   *low_in1 = force_lowpart_subreg (DImode, op1, TImode);
   *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
   *high_dest = gen_reg_rtx (DImode);
-  *high_in1 = gen_highpart (DImode, op1);
-  *high_in2 = simplify_gen_subreg (DImode, op2, TImode,
-				   subreg_highpart_offset (DImode, TImode));
+  *high_in1 = force_highpart_subreg (DImode, op1, TImode);
+  *high_in2 = force_highpart_subreg (DImode, op2, TImode);
 }
 
 /* Generate DImode scratch registers for 128-bit (TImode) subtraction.
 
-   This function differs from 'arch64_addti_scratch_regs' in that
-   OP1 can be an immediate constant (zero). We must call
-   subreg_highpart_offset with DImode and TImode arguments, otherwise
-   VOIDmode will be used for the const_int which generates an internal
-   error from subreg_size_highpart_offset which does not expect a size of zero.
-
    OP1 represents the TImode destination operand 1
    OP2 represents the TImode destination operand 2
    LOW_DEST represents the low half (DImode) of TImode operand 0
@@ -26907,10 +26900,8 @@  aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest,
   *low_in2 = force_lowpart_subreg (DImode, op2, TImode);
   *high_dest = gen_reg_rtx (DImode);
 
-  *high_in1 = simplify_gen_subreg (DImode, op1, TImode,
-				   subreg_highpart_offset (DImode, TImode));
-  *high_in2 = simplify_gen_subreg (DImode, op2, TImode,
-				   subreg_highpart_offset (DImode, TImode));
+  *high_in1 = force_highpart_subreg (DImode, op1, TImode);
+  *high_in2 = force_highpart_subreg (DImode, op2, TImode);
 }
 
 /* Generate RTL for 128-bit (TImode) subtraction with overflow.