From patchwork Mon Jun 17 09:53:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 1948590 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4W2ld92f6Fz20Wg for ; Mon, 17 Jun 2024 19:55:57 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 9AE4D38708D1 for ; Mon, 17 Jun 2024 09:55:55 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 55D223858C31 for ; Mon, 17 Jun 2024 09:54:12 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 55D223858C31 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 55D223858C31 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1718618053; cv=none; b=aAvdRIXdV77TYL2PD4qPGUttcekkuPwhejFp9I7bvLmoWZA8w8vCJaNT0z9lbErhWRoz8fgp9Du8i7ur0azuXso7GFHc47hMc3/+xFDELwAksHuWszVnnOuWiTcp9U93JIi9yAL6WND72iQEneUaK03stDhKcRNEa14Q/ViL6UQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1718618053; c=relaxed/simple; bh=9SvVDrm0eDlHNAjqEFGjwa5UfiLrt+uIB+uIuDwHpAw=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=Ci601+1e01Ik/+b0iCWLLjdpZNG5yjmt+dligAldaUiSfPS4Nix0QnMmOwIHIPXCzOVeL4jJ3X7ul0oZwrZz/pIfsR116QuAXfm26v1VaEnrQroiGI1z0nw3FoqGeR2W8LmN6HlvOAOvum7J8XefnARRQNrHw9Sxjc5NeM+AbX8= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A5C1E152B; Mon, 17 Jun 2024 02:54:36 -0700 (PDT) Received: from e121540-lin.manchester.arm.com (e121540-lin.manchester.arm.com [10.32.110.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7C6C73F6A8; Mon, 17 Jun 2024 02:54:11 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Cc: Richard Sandiford Subject: [PATCH 4/8] Add force_lowpart_subreg Date: Mon, 17 Jun 2024 10:53:32 +0100 Message-Id: <20240617095336.871176-5-richard.sandiford@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240617095336.871176-1-richard.sandiford@arm.com> References: <20240617095336.871176-1-richard.sandiford@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-20.1 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org optabs had a local function called lowpart_subreg_maybe_copy that is very similar to the lowpart version of force_subreg. This patch adds a force_lowpart_subreg wrapper around force_subreg and uses it in optabs.cc. The only difference between the old and new functions is that the old one asserted success while the new one doesn't. It's common not to assert elsewhere when taking subregs; normally a null result is enough. Later patches will make more use of the new function. gcc/ * explow.h (force_lowpart_subreg): Declare. * explow.cc (force_lowpart_subreg): New function. * optabs.cc (lowpart_subreg_maybe_copy): Delete. (expand_absneg_bit): Use force_lowpart_subreg instead of lowpart_subreg_maybe_copy. (expand_copysign_bit): Likewise. --- gcc/explow.cc | 14 ++++++++++++++ gcc/explow.h | 1 + gcc/optabs.cc | 24 ++---------------------- 3 files changed, 17 insertions(+), 22 deletions(-) diff --git a/gcc/explow.cc b/gcc/explow.cc index bd93c878064..2a91cf76ea6 100644 --- a/gcc/explow.cc +++ b/gcc/explow.cc @@ -764,6 +764,20 @@ force_subreg (machine_mode outermode, rtx op, return res; } +/* Try to return an rvalue expression for the OUTERMODE lowpart of OP, + which has mode INNERMODE. Allow OP to be forced into a new register + if necessary. + + Return null on failure. */ + +rtx +force_lowpart_subreg (machine_mode outermode, rtx op, + machine_mode innermode) +{ + auto byte = subreg_lowpart_offset (outermode, innermode); + return force_subreg (outermode, op, innermode, byte); +} + /* If X is a memory ref, copy its contents to a new temp reg and return that reg. Otherwise, return X. */ diff --git a/gcc/explow.h b/gcc/explow.h index cbd1fcb7eb3..dd654649b06 100644 --- a/gcc/explow.h +++ b/gcc/explow.h @@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode); extern rtx force_reg (machine_mode, rtx); extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64); +extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode); /* Return given rtx, copied into a new temp reg if it was in memory. */ extern rtx force_not_mem (rtx); diff --git a/gcc/optabs.cc b/gcc/optabs.cc index c54d275b8b7..d569742beea 100644 --- a/gcc/optabs.cc +++ b/gcc/optabs.cc @@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target) return 0; } -/* Extract the OMODE lowpart from VAL, which has IMODE. Under certain - conditions, VAL may already be a SUBREG against which we cannot generate - a further SUBREG. In this case, we expect forcing the value into a - register will work around the situation. */ - -static rtx -lowpart_subreg_maybe_copy (machine_mode omode, rtx val, - machine_mode imode) -{ - rtx ret; - ret = lowpart_subreg (omode, val, imode); - if (ret == NULL) - { - val = force_reg (imode, val); - ret = lowpart_subreg (omode, val, imode); - gcc_assert (ret != NULL); - } - return ret; -} - /* Expand a floating point absolute value or negation operation via a logical operation on the sign bit. */ @@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode, gen_lowpart (imode, op0), immed_wide_int_const (mask, imode), gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN); - target = lowpart_subreg_maybe_copy (mode, temp, imode); + target = force_lowpart_subreg (mode, temp, imode); set_dst_reg_note (get_last_insn (), REG_EQUAL, gen_rtx_fmt_e (code, mode, copy_rtx (op0)), @@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target, temp = expand_binop (imode, ior_optab, op0, op1, gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN); - target = lowpart_subreg_maybe_copy (mode, temp, imode); + target = force_lowpart_subreg (mode, temp, imode); } return target;