diff mbox series

Fix ICE in rtl check due to CONST_WIDE_INT in CONST_VECTOR_DUPLICATE_P

Message ID 20240611053635.3886431-1-hongtao.liu@intel.com
State New
Headers show
Series Fix ICE in rtl check due to CONST_WIDE_INT in CONST_VECTOR_DUPLICATE_P | expand

Commit Message

liuhongt June 11, 2024, 5:36 a.m. UTC 
In theory, const_wide_int can also be handle with extra check for each 
components of the HOST_WIDE_INT array, and the check is need for both
shift and bit_and operands.
I assume the optimization opportnunity is rare, so the patch just add
extra check to make sure GET_MODE_INNER (mode) can fix into a
HOST_WIDE_INT.

gcc/ChangeLog:

	PR target/115384
	* simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
	Only do the simplification of (AND (ASHIFTRT A imm) mask)
	to (LSHIFTRT A imm) when inner mode fits HOST_WIDE_INT.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/pr115384.c: New test.
---
 gcc/simplify-rtx.cc                      |  4 +++-
 gcc/testsuite/gcc.target/i386/pr115384.c | 12 ++++++++++++
 2 files changed, 15 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr115384.c

Comments

Jakub Jelinek June 11, 2024, 6:10 a.m. UTC | #1 
On Tue, Jun 11, 2024 at 01:36:35PM +0800, liuhongt wrote:
> In theory, const_wide_int can also be handle with extra check for each 
> components of the HOST_WIDE_INT array, and the check is need for both
> shift and bit_and operands.
> I assume the optimization opportnunity is rare, so the patch just add
> extra check to make sure GET_MODE_INNER (mode) can fix into a
> HOST_WIDE_INT.

I think if you only handle CONST_INT_P, you should check just for that, and
in both places where you check for CONST_VECTOR_DUPLICATE_P (there is one
spot 2 lines above this).
So add
&& CONST_INT_P (XVECEXP (XEXP (op0, 1), 0, 0))
and
&& CONST_INT_P (XVECEXP (op1, 0, 0))
tests right below those && CONST_VECTOR_DUPLICATE_P (something) tests.
> 
> gcc/ChangeLog:
> 
> 	PR target/115384
> 	* simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
> 	Only do the simplification of (AND (ASHIFTRT A imm) mask)
> 	to (LSHIFTRT A imm) when inner mode fits HOST_WIDE_INT.
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.target/i386/pr115384.c: New test.

	Jakub
diff mbox series

Patch

diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
index 9bc3ef9ad9f..4992bee7506 100644
--- a/gcc/simplify-rtx.cc
+++ b/gcc/simplify-rtx.cc
@@ -4074,7 +4074,9 @@  simplify_context::simplify_binary_operation_1 (rtx_code code,
 	      || (GET_CODE (XEXP (op0, 1)) == CONST_VECTOR
 		  && CONST_VECTOR_DUPLICATE_P (XEXP (op0, 1))))
 	  && GET_CODE (op1) == CONST_VECTOR
-	  && CONST_VECTOR_DUPLICATE_P (op1))
+	  && CONST_VECTOR_DUPLICATE_P (op1)
+	  && (GET_MODE_PRECISION (GET_MODE_INNER (mode))
+	      <= HOST_BITS_PER_WIDE_INT))
 	{
 	  unsigned HOST_WIDE_INT shift_count
 	    = (CONST_INT_P (XEXP (op0, 1))
diff --git a/gcc/testsuite/gcc.target/i386/pr115384.c b/gcc/testsuite/gcc.target/i386/pr115384.c
new file mode 100644
index 00000000000..3ba7a0b8115
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr115384.c
@@ -0,0 +1,12 @@ 
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O" } */
+
+typedef __attribute__((__vector_size__(sizeof(__int128)))) __int128 W;
+
+W w;
+
+void
+foo()
+{
+  w = w >> 4 & 18446744073709551600llu;
+}