@@ -7029,6 +7029,18 @@ md_assemble (char *line)
as_bad (_("{rex2} prefix invalid with `%s'"), insn_name (&i.tm));
return;
}
+ /* Check for 8 bit operand that uses old registers. */
+ for (unsigned int op = 0; op < i.operands; op++)
+ {
+ if (i.types[op].bitfield.class == Reg
+ && i.types[op].bitfield.byte
+ && !(i.op[op].regs->reg_flags & RegRex64)
+ && i.op[op].regs->reg_num > 3)
+
+ as_bad (_("can't encode register '%s' in an "
+ " EVEX/VEX prefix instruction"),
+ i.op[op].regs->reg_name);
+ }
if (is_apx_evex_encoding ())
build_apx_evex_prefix ();
@@ -12,3 +12,6 @@
.*:13: Error: \{nf\} unsupported for `mulx'
.*:14: Error: \{nf\} cannot be combined with \{vex\}/\{vex3\}
.*:15: Error: \{nf\} cannot be combined with \{vex\}/\{vex3\}
+.*:16: Error: can't encode register 'ah' in an EVEX/VEX prefix instruction
+.*:17: Error: can't encode register 'ah' in an EVEX/VEX prefix instruction
+#pass
@@ -13,3 +13,5 @@
{nf} mulx %r15,%r15,%r11
{nf} {vex} bextr %ecx, %edx, %r10d
{vex} {nf} bextr %ecx, %edx, %r10d
+ {nf} add %dl,%ah
+ {evex} adc %dl,%ah