From patchwork Mon Mar 11 06:59:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chenghui Pan X-Patchwork-Id: 1910328 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TtSN4503bz1yWm for ; Mon, 11 Mar 2024 18:00:34 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 677AC386103B for ; Mon, 11 Mar 2024 07:00:31 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 4A97738582AE for ; Mon, 11 Mar 2024 07:00:04 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4A97738582AE Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 4A97738582AE Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1710140409; cv=none; b=oxo3hO/sMx+Por/1DvRUkK4vUECD+DMMSFwG3dZ724BGwU/8mqgC2LX9cf69z+xSkxxY1aJCe1VHFjYGFY4lWSj2Vfv33Te/2bJ1p7n5M9SlWJh+8MUNAzzUgGIIUel7DSZGKuEHkA0A6wg1PF6ux1wKdgKCCG5kM1HolUTsJcE= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1710140409; c=relaxed/simple; bh=h59TZVQ9y2wxLBpNo1rWV4mbYQz9vg0OnJ95zdGHaVs=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=rCRn+xKbki+0L75TjcHTbs1twTYEbppud+00M1y0yMhLcjEaW1Nbg0PRbkNt80HjdiuKQbudQV8XVjG/0ZgKSvzEJJ95cDfTtFkTZldC21mtNsQh9Hqr1azCIbXfvzNlRNDiFzzkFWx+g67jGzPIYCR2kxDH0oNd2ubZAQHJc5M= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [10.2.6.5]) by gateway (Coremail) with SMTP id _____8Cx2ujxq+5llQwXAA--.36992S3; Mon, 11 Mar 2024 15:00:01 +0800 (CST) Received: from 5.5.5 (unknown [10.2.6.5]) by localhost.localdomain (Coremail) with SMTP id AQAAf8AxzxPlq+5lVA5WAA--.40499S7; Mon, 11 Mar 2024 15:00:01 +0800 (CST) From: Chenghui Pan To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, chenglulu@loongson.cn, xuchenghua@loongson.cn, Chenghui Pan Subject: [PATCH v1 3/3] LoongArch: Combine UNITS_PER_FP_REG and UNITS_PER_FPREG macros. Date: Mon, 11 Mar 2024 14:59:47 +0800 Message-Id: <20240311065947.481074-4-panchenghui@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240311065947.481074-1-panchenghui@loongson.cn> References: <20240311065947.481074-1-panchenghui@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8AxzxPlq+5lVA5WAA--.40499S7 X-CM-SenderInfo: psdquxxhqjx33l6o00pqjv00gofq/1tbiAQANBGXtb2YEtwAAs6 X-Coremail-Antispam: 1Uk129KBj93XoWxArW8Wr4ktFy7CrW8Ary3WrX_yoWrJF4kpr W7Awnxtr48Xas8JrZ5J3yrWF4kJrn7GFZFqay3KrWvkrWDAr18Ar10kryvqFWUt3yrJr4Y vr1rGa9Fv3Z5A3gCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkFb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r126r13M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx 1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv 67AKxVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2 Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s02 6x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0x vE2Ix0cI8IcVAFwI0_JFI_Gr1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE 42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6x kF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07j5l1kUUUUU= X-Spam-Status: No, score=-12.8 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org These macros are completely same in definition, so we can keep the previous one and eliminate later one. gcc/ChangeLog: * config/loongarch/loongarch.cc (loongarch_hard_regno_mode_ok_uncached): Combine UNITS_PER_FP_REG and UNITS_PER_FPREG macros. (loongarch_hard_regno_nregs): Ditto. (loongarch_class_max_nregs): Ditto. (loongarch_get_separate_components): Ditto. (loongarch_process_components): Ditto. * config/loongarch/loongarch.h (UNITS_PER_FPREG): Ditto. (UNITS_PER_HWFPVALUE): Ditto. (UNITS_PER_FPVALUE): Ditto. Change-Id: Ic3b846bcc5af710a3bfd9ae1db771ae93411ea13 --- gcc/config/loongarch/loongarch.cc | 10 +++++----- gcc/config/loongarch/loongarch.h | 7 ++----- 2 files changed, 7 insertions(+), 10 deletions(-) diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index e1073c9debd..519e29db1c3 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -6757,7 +6757,7 @@ loongarch_hard_regno_mode_ok_uncached (unsigned int regno, machine_mode mode) and TRUNC. There's no point allowing sizes smaller than a word, because the FPU has no appropriate load/store instructions. */ if (mclass == MODE_INT) - return size >= MIN_UNITS_PER_WORD && size <= UNITS_PER_FPREG; + return size >= MIN_UNITS_PER_WORD && size <= UNITS_PER_FP_REG; } return false; @@ -6800,7 +6800,7 @@ loongarch_hard_regno_nregs (unsigned int regno, machine_mode mode) if (LASX_SUPPORTED_MODE_P (mode)) return 1; - return (GET_MODE_SIZE (mode) + UNITS_PER_FPREG - 1) / UNITS_PER_FPREG; + return (GET_MODE_SIZE (mode) + UNITS_PER_FP_REG - 1) / UNITS_PER_FP_REG; } /* All other registers are word-sized. */ @@ -6835,7 +6835,7 @@ loongarch_class_max_nregs (enum reg_class rclass, machine_mode mode) else if (LSX_SUPPORTED_MODE_P (mode)) size = MIN (size, UNITS_PER_LSX_REG); else - size = MIN (size, UNITS_PER_FPREG); + size = MIN (size, UNITS_PER_FP_REG); } left &= ~reg_class_contents[FP_REGS]; } @@ -8209,7 +8209,7 @@ loongarch_get_separate_components (void) if (IMM12_OPERAND (offset)) bitmap_set_bit (components, regno); - offset -= UNITS_PER_FPREG; + offset -= UNITS_PER_FP_REG; } /* Don't mess with the hard frame pointer. */ @@ -8288,7 +8288,7 @@ loongarch_process_components (sbitmap components, loongarch_save_restore_fn fn) if (bitmap_bit_p (components, regno)) loongarch_save_restore_reg (mode, regno, offset, fn); - offset -= UNITS_PER_FPREG; + offset -= UNITS_PER_FP_REG; } } diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h index bf2351f0968..888a633961d 100644 --- a/gcc/config/loongarch/loongarch.h +++ b/gcc/config/loongarch/loongarch.h @@ -138,19 +138,16 @@ along with GCC; see the file COPYING3. If not see /* Width of a LASX vector register in bits. */ #define BITS_PER_LASX_REG (UNITS_PER_LASX_REG * BITS_PER_UNIT) -/* For LARCH, width of a floating point register. */ -#define UNITS_PER_FPREG (TARGET_DOUBLE_FLOAT ? 8 : 4) - /* The largest size of value that can be held in floating-point registers and moved with a single instruction. */ #define UNITS_PER_HWFPVALUE \ - (TARGET_SOFT_FLOAT ? 0 : UNITS_PER_FPREG) + (TARGET_SOFT_FLOAT ? 0 : UNITS_PER_FP_REG) /* The largest size of value that can be held in floating-point registers. */ #define UNITS_PER_FPVALUE \ (TARGET_SOFT_FLOAT ? 0 \ - : TARGET_SINGLE_FLOAT ? UNITS_PER_FPREG \ + : TARGET_SINGLE_FLOAT ? UNITS_PER_FP_REG \ : LONG_DOUBLE_TYPE_SIZE / BITS_PER_UNIT) /* The number of bytes in a double. */