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bh=jdf/pWTnnwXXTyN1ZVJLMQwybNl7klpJ9Dcl+KjgR9Q=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=LyeNV1k/NKkhhq73v1X2CpyYXN+XpulrQGgGTR+eYSDmDdulN/nR2jXRfcyOnUpRNqfqka0XkXkXUOvJGPGYM/rMIdtHk1C79QbOmLZvpc3uIK+9Y3UhDIj2L256ydIkvMjWx1gNoN7Ge28tmre+rSe+l7L2V9l+mu6x5PQMS7c= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from localhost.localdomain (unknown [122.8.183.87]) by APP-01 (Coremail) with SMTP id qwCowAAHDIwm7aRl0e5RBw--.60161S4; Mon, 15 Jan 2024 16:30:40 +0800 (CST) From: Liao Shihua To: gcc-patches@gcc.gnu.org Cc: christoph.muellner@vrull.eu, kito.cheng@gmail.com, shiyulong@iscas.ac.cn, jiawei@iscas.ac.cn, chenyixuan@iscas.ac.cn, jeffreyalaw@gmail.com, Liao Shihua Subject: [PATCH v4 2/3] RISC-V: Add C intrinsic for Scalar Crypto Extension Date: Mon, 15 Jan 2024 16:31:34 +0800 Message-Id: <20240115083135.2120665-3-shihua@iscas.ac.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240115083135.2120665-1-shihua@iscas.ac.cn> References: <20240115083135.2120665-1-shihua@iscas.ac.cn> MIME-Version: 1.0 X-CM-TRANSID: qwCowAAHDIwm7aRl0e5RBw--.60161S4 X-Coremail-Antispam: 1UD129KBjvAXoWfJr1xGFWDZr1fGF1kXrWxXrb_yoW8Ar17Jo WFgr1Fya4fGr13uFsIkr1UGryqqa4rZF4UZayrZrW5KFn3Cwnakr4rtr1DAF40g3yxA3W5 Zas2qr4fAFW7Cr93n29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUYP7AC8VAFwI0_Wr0E3s1l1xkIjI8I6I8E6xAIw20EY4v20xva j40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l82xGYIkIc2x26280x7IE14v26r15M28IrcIa0x kI8VCY1x0267AKxVW8JVW5JwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK021l84AC jcxK6xIIjxv20xvE14v26r4j6ryUM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4j6F4UM2 8EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I8E87Iv6xkF7I0E14v26rxl6s0DM2AI xVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20x vE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xv r2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7MxAIw28IcxkI7VAKI48JMxC20s 026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_ JrI_JrWlx4CE17CEb7AF67AKxVWUtVW8ZwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14 v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwCI42IY6xAIw20EY4v20xva j40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x0267AKxVW8JV W8JrUvcSsGvfC2KfnxnUUI43ZEXa7VUjYiiDUUUUU== X-Originating-IP: [122.8.183.87] X-CM-SenderInfo: xvklx33d6l2u1dvotugofq/1tbiDAcREWWk5CIiqQAAsH X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_DNSWL_LOW, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org This patch adds C intrinsics for Scalar Crypto Extension. gcc/ChangeLog: * config.gcc: Include riscv_crypto.h. * config/riscv/riscv_crypto.h: New file. gcc/testsuite/ChangeLog: * gcc.target/riscv/scalar_crypto_intrinsic-32.c: New test. * gcc.target/riscv/scalar_crypto_intrinsic-64.c: New test. --- gcc/config.gcc | 2 +- gcc/config/riscv/riscv_crypto.h | 309 ++++++++++++++++++ .../riscv/scalar_crypto_intrinsic-32.c | 115 +++++++ .../riscv/scalar_crypto_intrinsic-64.c | 123 +++++++ 4 files changed, 548 insertions(+), 1 deletion(-) create mode 100644 gcc/config/riscv/riscv_crypto.h create mode 100644 gcc/testsuite/gcc.target/riscv/scalar_crypto_intrinsic-32.c create mode 100644 gcc/testsuite/gcc.target/riscv/scalar_crypto_intrinsic-64.c diff --git a/gcc/config.gcc b/gcc/config.gcc index d17787bc9ad..11c3a647b5e 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -549,7 +549,7 @@ riscv*) extra_objs="${extra_objs} riscv-vector-builtins.o riscv-vector-builtins-shapes.o riscv-vector-builtins-bases.o" extra_objs="${extra_objs} thead.o riscv-target-attr.o" d_target_objs="riscv-d.o" - extra_headers="riscv_vector.h" + extra_headers="riscv_vector.h riscv_crypto.h" target_gtfiles="$target_gtfiles \$(srcdir)/config/riscv/riscv-vector-builtins.cc" target_gtfiles="$target_gtfiles \$(srcdir)/config/riscv/riscv-vector-builtins.h" ;; diff --git a/gcc/config/riscv/riscv_crypto.h b/gcc/config/riscv/riscv_crypto.h new file mode 100644 index 00000000000..1bfe3d7c675 --- /dev/null +++ b/gcc/config/riscv/riscv_crypto.h @@ -0,0 +1,309 @@ +/* RISC-V 'Scalar Crypto' Extension intrinsics include file. + Copyright (C) 2024 Free Software Foundation, Inc. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + . */ + +#ifndef __RISCV_SCALAR_CRYPTO_H +#define __RISCV_SCALAR_CRYPTO_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined (__riscv_zknd) + +#if __riscv_xlen == 32 + +#ifdef __OPTIMIZE__ + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_aes32dsi (uint32_t rs1, uint32_t rs2, const int bs) +{ + return __builtin_riscv_aes32dsi (rs1,rs2,bs); +} + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_aes32dsmi (uint32_t rs1, uint32_t rs2, const int bs) +{ + return __builtin_riscv_aes32dsmi (rs1,rs2,bs); +} + +#else +#define __riscv_aes32dsi(x, y, bs) __builtin_riscv_aes32dsi (x, y, bs) +#define __riscv_aes32dsmi(x, y, bs) __builtin_riscv_aes32dsmi (x, y, bs) +#endif + +#endif + +#if __riscv_xlen == 64 + +extern __inline uint64_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_aes64ds (uint64_t rs1, uint64_t rs2) +{ + return __builtin_riscv_aes64ds (rs1,rs2); +} + +extern __inline uint64_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_aes64dsm (uint64_t rs1, uint64_t rs2) +{ + return __builtin_riscv_aes64dsm (rs1,rs2); +} + +extern __inline uint64_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_aes64im (uint64_t rs1) +{ + return __builtin_riscv_aes64im (rs1); +} +#endif +#endif // __riscv_zknd + +#if (defined (__riscv_zknd) || defined (__riscv_zkne)) && (__riscv_xlen == 64) + +#ifdef __OPTIMIZE__ + +extern __inline uint64_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_aes64ks1i (uint64_t rs1, const int rnum) +{ + return __builtin_riscv_aes64ks1i (rs1,rnum); +} + +#else +#define __riscv_aes64ks1i(x, rnum) __builtin_riscv_aes64ks1i (x, rnum) +#endif + +extern __inline uint64_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_aes64ks2 (uint64_t rs1, uint64_t rs2) +{ + return __builtin_riscv_aes64ks2 (rs1,rs2); +} + +#endif // __riscv_zknd || __riscv_zkne + +#if defined (__riscv_zkne) + +#if __riscv_xlen == 32 + +#ifdef __OPTIMIZE__ + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_aes32esi (uint32_t rs1, uint32_t rs2, const int bs) +{ + return __builtin_riscv_aes32esi (rs1,rs2,bs); +} + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_aes32esmi (uint32_t rs1, uint32_t rs2, const int bs) +{ + return __builtin_riscv_aes32esmi (rs1,rs2,bs); +} + +#else +#define __riscv_aes32esi(x, y, bs) __builtin_riscv_aes32esi (x, y, bs) +#define __riscv_aes32esmi(x, y, bs) __builtin_riscv_aes32esmi (x, y, bs) +#endif + +#endif + +#if __riscv_xlen == 64 + +extern __inline uint64_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_aes64es (uint64_t rs1,uint64_t rs2) +{ + return __builtin_riscv_aes64es (rs1,rs2); +} + +extern __inline uint64_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_aes64esm (uint64_t rs1,uint64_t rs2) +{ + return __builtin_riscv_aes64esm (rs1,rs2); +} +#endif +#endif // __riscv_zkne + +#if defined (__riscv_zknh) + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sha256sig0 (uint32_t rs1) +{ + return __builtin_riscv_sha256sig0 (rs1); +} + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sha256sig1 (uint32_t rs1) +{ + return __builtin_riscv_sha256sig1 (rs1); +} + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sha256sum0 (uint32_t rs1) +{ + return __builtin_riscv_sha256sum0 (rs1); +} + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sha256sum1 (uint32_t rs1) +{ + return __builtin_riscv_sha256sum1 (rs1); +} + +#if __riscv_xlen == 32 + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sha512sig0h (uint32_t rs1, uint32_t rs2) +{ + return __builtin_riscv_sha512sig0h (rs1,rs2); +} + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sha512sig0l (uint32_t rs1, uint32_t rs2) +{ + return __builtin_riscv_sha512sig0l (rs1,rs2); +} + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sha512sig1h (uint32_t rs1, uint32_t rs2) +{ + return __builtin_riscv_sha512sig1h (rs1,rs2); +} + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sha512sig1l (uint32_t rs1, uint32_t rs2) +{ + return __builtin_riscv_sha512sig1l (rs1,rs2); +} + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sha512sum0r (uint32_t rs1, uint32_t rs2) +{ + return __builtin_riscv_sha512sum0r (rs1,rs2); +} + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sha512sum1r (uint32_t rs1, uint32_t rs2) +{ + return __builtin_riscv_sha512sum1r (rs1,rs2); +} + +#endif + +#if __riscv_xlen == 64 + +extern __inline uint64_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sha512sig0 (uint64_t rs1) +{ + return __builtin_riscv_sha512sig0 (rs1); +} + +extern __inline uint64_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sha512sig1 (uint64_t rs1) +{ + return __builtin_riscv_sha512sig1 (rs1); +} + +extern __inline uint64_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sha512sum0 (uint64_t rs1) +{ + return __builtin_riscv_sha512sum0 (rs1); +} + +extern __inline uint64_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sha512sum1 (uint64_t rs1) +{ + return __builtin_riscv_sha512sum1 (rs1); +} +#endif +#endif // __riscv_zknh + +#if defined (__riscv_zksh) + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sm3p0 (uint32_t rs1) +{ + return __builtin_riscv_sm3p0 (rs1); +} + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sm3p1 (uint32_t rs1) +{ + return __builtin_riscv_sm3p1 (rs1); +} + +#endif // __riscv_zksh + +#if defined (__riscv_zksed) + +#ifdef __OPTIMIZE__ + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sm4ed (uint32_t rs1, uint32_t rs2, const int bs) +{ + return __builtin_riscv_sm4ed (rs1,rs2,bs); +} + +extern __inline uint32_t +__attribute__ ((__gnu_inline__, __always_inline__, __artificial__)) +__riscv_sm4ks (uint32_t rs1, uint32_t rs2, const int bs) +{ + return __builtin_riscv_sm4ks (rs1,rs2,bs); +} + +#else +#define __riscv_sm4ed(x, y, bs) __builtin_riscv_sm4ed(x, y, bs); +#define __riscv_sm4ks(x, y, bs) __builtin_riscv_sm4ks(x, y, bs); +#endif + +#endif // __riscv_zksed + +#if defined (__cplusplus) +} +#endif // __cplusplus +#endif // __RISCV_SCALAR_CRYPTO_H diff --git a/gcc/testsuite/gcc.target/riscv/scalar_crypto_intrinsic-32.c b/gcc/testsuite/gcc.target/riscv/scalar_crypto_intrinsic-32.c new file mode 100644 index 00000000000..87d576ab685 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/scalar_crypto_intrinsic-32.c @@ -0,0 +1,115 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target rv32 } */ +/* { dg-options "-march=rv32gc_zknd_zkne_zknh_zksed_zksh -mabi=ilp32d" } */ +/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */ + +#include "riscv_crypto.h" + +uint32_t foo1 (uint32_t rs1, uint32_t rs2) +{ + return __riscv_aes32dsi (rs1,rs2,1); +} + +uint32_t foo2 (uint32_t rs1, uint32_t rs2) +{ + return __riscv_aes32dsmi (rs1,rs2,1); +} + +uint32_t foo3 (uint32_t rs1, uint32_t rs2) +{ + return __riscv_aes32esi (rs1,rs2,1); +} + +uint32_t foo4 (uint32_t rs1, uint32_t rs2) +{ + return __riscv_aes32esmi (rs1,rs2,1); +} + +uint32_t foo5 (uint32_t rs1) +{ + return __riscv_sha256sig0 (rs1); +} + +uint32_t foo6 (uint32_t rs1) +{ + return __riscv_sha256sig1 (rs1); +} + +uint32_t foo7 (uint32_t rs1) +{ + return __riscv_sha256sum0 (rs1); +} + +uint32_t foo8 (uint32_t rs1) +{ + return __riscv_sha256sum1 (rs1); +} + +uint32_t foo9 (uint32_t rs1, uint32_t rs2) +{ + return __riscv_sha512sig0h (rs1,rs2); +} + +uint32_t foo10 (uint32_t rs1, uint32_t rs2) +{ + return __riscv_sha512sig0l (rs1,rs2); +} + +uint32_t foo11 (uint32_t rs1, uint32_t rs2) +{ + return __riscv_sha512sig1h (rs1,rs2); +} + +uint32_t foo12 (uint32_t rs1, uint32_t rs2) +{ + return __riscv_sha512sig1l (rs1,rs2); +} + +uint32_t foo13 (uint32_t rs1, uint32_t rs2) +{ + return __riscv_sha512sum0r (rs1,rs2); +} + +uint32_t foo14 (uint32_t rs1, uint32_t rs2) +{ + return __riscv_sha512sum1r (rs1,rs2); +} + +uint32_t foo15 (uint32_t rs1) +{ + return __riscv_sm3p0 (rs1); +} + +uint32_t foo16 (uint32_t rs1) +{ + return __riscv_sm3p1 (rs1); +} + +uint32_t foo17 (uint32_t rs1, uint32_t rs2) +{ + return __riscv_sm4ed (rs1,rs2,1); +} + +uint32_t foo18 (uint32_t rs1, uint32_t rs2) +{ + return __riscv_sm4ks (rs1,rs2,1); +} + +/* { dg-final { scan-assembler-times "aes32dsi" 1 } } */ +/* { dg-final { scan-assembler-times "aes32dsmi" 1 } } */ +/* { dg-final { scan-assembler-times "aes32esi" 1 } } */ +/* { dg-final { scan-assembler-times "aes32esmi" 1 } } */ +/* { dg-final { scan-assembler-times "sha256sig0" 1 } } */ +/* { dg-final { scan-assembler-times "sha256sig1" 1 } } */ +/* { dg-final { scan-assembler-times "sha256sum0" 1 } } */ +/* { dg-final { scan-assembler-times "sha256sum1" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sig0h" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sig0l" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sig1h" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sig1l" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sum0r" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sum1r" 1 } } */ +/* { dg-final { scan-assembler-times "sm3p0" 1 } } */ +/* { dg-final { scan-assembler-times "sm3p1" 1 } } */ +/* { dg-final { scan-assembler-times "sm4ks" 1 } } */ +/* { dg-final { scan-assembler-times "sm4ed" 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/scalar_crypto_intrinsic-64.c b/gcc/testsuite/gcc.target/riscv/scalar_crypto_intrinsic-64.c new file mode 100644 index 00000000000..01c4a4ed04c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/scalar_crypto_intrinsic-64.c @@ -0,0 +1,123 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target rv64 } */ +/* { dg-options "-march=rv64gc_zknd_zkne_zknh_zksed_zksh -mabi=lp64d" } */ +/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */ + +#include "riscv_crypto.h" + +uint64_t foo1 (uint64_t rs1, uint64_t rs2) +{ + return __riscv_aes64ds (rs1,rs2); +} + +uint64_t foo2 (uint64_t rs1, uint64_t rs2) +{ + return __riscv_aes64dsm (rs1,rs2); +} + +uint64_t foo3 (uint64_t rs1) +{ + return __riscv_aes64im (rs1); +} + +uint64_t foo4 (uint64_t rs1) +{ + return __riscv_aes64ks1i (rs1,1); +} + +uint64_t foo5 (uint64_t rs1, uint64_t rs2) +{ + return __riscv_aes64ks2 (rs1,rs2); +} + +uint64_t foo6 (uint64_t rs1, uint64_t rs2) +{ + return __riscv_aes64es (rs1,rs2); +} + +uint64_t foo7 (uint64_t rs1, uint64_t rs2) +{ + return __riscv_aes64esm (rs1,rs2); +} + +uint64_t foo8 (uint64_t rs1) +{ + return __riscv_sha512sig0 (rs1); +} + +uint64_t foo9 (uint64_t rs1) +{ + return __riscv_sha512sig1 (rs1); +} + +uint64_t foo10 (uint64_t rs1) +{ + return __riscv_sha512sum0 (rs1); +} + +uint64_t foo11 (uint64_t rs1) +{ + return __riscv_sha512sum1 (rs1); +} + +uint32_t foo12 (uint32_t rs1) +{ + return __riscv_sha256sig0 (rs1); +} + +uint32_t foo13 (uint32_t rs1) +{ + return __riscv_sha256sig1 (rs1); +} + +uint32_t foo14 (uint32_t rs1) +{ + return __riscv_sha256sum0 (rs1); +} + +uint32_t foo15 (uint32_t rs1) +{ + return __riscv_sha256sum1 (rs1); +} + +uint32_t foo16 (uint32_t rs1) +{ + return __riscv_sm3p0 (rs1); +} + +uint32_t foo17 (uint32_t rs1) +{ + return __riscv_sm3p1 (rs1); +} + +uint32_t foo18 (uint32_t rs1, uint32_t rs2) +{ + return __riscv_sm4ed (rs1,rs2,1); +} + +uint32_t foo19 (uint32_t rs1, uint32_t rs2) +{ + return __riscv_sm4ks (rs1,rs2,1); +} + +/* { dg-final { scan-assembler-times "aes64ds\t" 1 } } */ +/* { dg-final { scan-assembler-times "aes64dsm" 1 } } */ +/* { dg-final { scan-assembler-times "aes64ks1i" 1 } } */ +/* { dg-final { scan-assembler-times "aes64ks2" 1 } } */ +/* { dg-final { scan-assembler-times "aes64im" 1 } } */ +/* { dg-final { scan-assembler-times "aes64es\t" 1 } } */ +/* { dg-final { scan-assembler-times "aes64esm" 1 } } */ +/* { dg-final { scan-assembler-times "aes64ks1i" 1 } } */ +/* { dg-final { scan-assembler-times "aes64ks2" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sig0" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sig1" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sum0" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sum1" 1 } } */ +/* { dg-final { scan-assembler-times "sha256sig0" 1 } } */ +/* { dg-final { scan-assembler-times "sha256sig1" 1 } } */ +/* { dg-final { scan-assembler-times "sha256sum0" 1 } } */ +/* { dg-final { scan-assembler-times "sha256sum1" 1 } } */ +/* { dg-final { scan-assembler-times "sm3p0" 1 } } */ +/* { dg-final { scan-assembler-times "sm3p1" 1 } } */ +/* { dg-final { scan-assembler-times "sm4ks" 1 } } */ +/* { dg-final { scan-assembler-times "sm4ed" 1 } } */