@@ -4415,6 +4415,16 @@ (define_insn "*extzv_truncsi_exts"
[(set_attr "type" "arith")
(set_attr "mode" "SI")])
+(define_insn "*insqisi_extended"
+ [(set (match_operand:DI 0 "register_operand" "=d")
+ (sign_extend:DI
+ (ior:SI (and:SI (subreg:SI (match_dup 0) 0)
+ (const_int 16777215))
+ (ashift:SI (subreg:SI (match_operand:QI 1 "register_operand" "d") 0)
+ (const_int 24)))))]
+ "TARGET_64BIT && !TARGET_MIPS16 && ISA_HAS_EXT_INS"
+ "ins\t%0,%1,24,8"
+ [(set_attr "mode" "SI")])
(define_expand "insvmisalign<mode>"
[(set (zero_extract:GPR (match_operand:BLK 0 "memory_operand")