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Date: Wed, 29 Nov 2023 17:06:47 +0800 Message-Id: <20231129090647.2796938-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Loop vectorizer will use vec_perm to select lower part of a vector, there could be some redundancy when using subreg in reduc__scal_m, because rtl cse can't figure out vec_select lower part is just subreg. I'm trying to canonicalize vec_select to subreg like aarch64 did, but there're so many regressions, some are easy to fix, some requires middle-end adjustment. So for simplicity, the patch use vec_select instead of subreg in reduc__scal_m. Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ready push to trunk. gcc/ChangeLog: * config/i386/sse.md: (reduc_plus_scal_): Use vec_extract_lo instead of subreg. (reduc__scal_): Ditto. (reduc__scal_): Ditto. (reduc__scal_): Ditto. (reduc__scal_): Ditto. --- gcc/config/i386/sse.md | 47 +++++++++++++++++++++++------------------- 1 file changed, 26 insertions(+), 21 deletions(-) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 4f511693e3f..5e0e0e9e51f 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -3480,11 +3480,12 @@ (define_expand "reduc_plus_scal_" "" { rtx tmp = gen_reg_rtx (mode); - emit_insn (gen_vec_extract_hi_ (tmp, operands[1])); rtx tmp2 = gen_reg_rtx (mode); - rtx tmp3 = gen_lowpart (mode, operands[1]); - emit_insn (gen_add3 (tmp2, tmp, tmp3)); - emit_insn (gen_reduc_plus_scal_ (operands[0], tmp2)); + rtx tmp3 = gen_reg_rtx (mode); + emit_insn (gen_vec_extract_hi_ (tmp, operands[1])); + emit_insn (gen_vec_extract_lo_ (tmp2, operands[1])); + emit_insn (gen_add3 (tmp3, tmp, tmp2)); + emit_insn (gen_reduc_plus_scal_ (operands[0], tmp3)); DONE; }) @@ -3528,11 +3529,12 @@ (define_expand "reduc__scal_" "" { rtx tmp = gen_reg_rtx (mode); - emit_insn (gen_vec_extract_hi_ (tmp, operands[1])); rtx tmp2 = gen_reg_rtx (mode); - emit_insn (gen_3 - (tmp2, tmp, gen_lowpart (mode, operands[1]))); - emit_insn (gen_reduc__scal_ (operands[0], tmp2)); + rtx tmp3 = gen_reg_rtx (mode); + emit_insn (gen_vec_extract_hi_ (tmp, operands[1])); + emit_insn (gen_vec_extract_lo_ (tmp2, operands[1])); + emit_insn (gen_3 (tmp3, tmp, tmp2)); + emit_insn (gen_reduc__scal_ (operands[0], tmp3)); DONE; }) @@ -3543,11 +3545,12 @@ (define_expand "reduc__scal_" "TARGET_AVX512F" { rtx tmp = gen_reg_rtx (mode); - emit_insn (gen_vec_extract_hi_ (tmp, operands[1])); rtx tmp2 = gen_reg_rtx (mode); - emit_insn (gen_3 - (tmp2, tmp, gen_lowpart (mode, operands[1]))); - emit_insn (gen_reduc__scal_ (operands[0], tmp2)); + rtx tmp3 = gen_reg_rtx (mode); + emit_insn (gen_vec_extract_hi_ (tmp, operands[1])); + emit_insn (gen_vec_extract_lo_ (tmp2, operands[1])); + emit_insn (gen_3 (tmp3, tmp, tmp2)); + emit_insn (gen_reduc__scal_ (operands[0], tmp3)); DONE; }) @@ -3558,14 +3561,15 @@ (define_expand "reduc__scal_" "TARGET_AVX2" { rtx tmp = gen_reg_rtx (mode); - emit_insn (gen_vec_extract_hi_ (tmp, operands[1])); rtx tmp2 = gen_reg_rtx (mode); - emit_insn (gen_3 - (tmp2, tmp, gen_lowpart (mode, operands[1]))); rtx tmp3 = gen_reg_rtx (mode); - ix86_expand_reduc (gen_3, tmp3, tmp2); + emit_insn (gen_vec_extract_hi_ (tmp, operands[1])); + emit_insn (gen_vec_extract_lo_ (tmp2, operands[1])); + emit_insn (gen_3 (tmp3, tmp, tmp2)); + rtx tmp4 = gen_reg_rtx (mode); + ix86_expand_reduc (gen_3, tmp4, tmp3); emit_insn (gen_vec_extract - (operands[0], tmp3, const0_rtx)); + (operands[0], tmp4, const0_rtx)); DONE; }) @@ -3637,11 +3641,12 @@ (define_expand "reduc__scal_" "" { rtx tmp = gen_reg_rtx (mode); - emit_insn (gen_vec_extract_hi_ (tmp, operands[1])); rtx tmp2 = gen_reg_rtx (mode); - rtx tmp3 = gen_lowpart (mode, operands[1]); - emit_insn (gen_3 (tmp2, tmp, tmp3)); - emit_insn (gen_reduc__scal_ (operands[0], tmp2)); + rtx tmp3 = gen_reg_rtx (mode); + emit_insn (gen_vec_extract_hi_ (tmp, operands[1])); + emit_insn (gen_vec_extract_lo_ (tmp2, operands[1])); + emit_insn (gen_3 (tmp3, tmp, tmp2)); + emit_insn (gen_reduc__scal_ (operands[0], tmp3)); DONE; })