From patchwork Mon Nov 13 14:26:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Earnshaw X-Patchwork-Id: 1863232 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4STWzS0QYJz1yRD for ; Tue, 14 Nov 2023 01:29:56 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E3242383624E for ; Mon, 13 Nov 2023 14:29:21 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 4DB673947429 for ; Mon, 13 Nov 2023 14:27:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4DB673947429 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=arm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 4DB673947429 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699885659; cv=none; b=EqgeJjkDA6bjkBTeyOgs03mQHJ8isAkWWLmR6sE2IRWEhnIs4nqpVxVDibdrKsgn13VjjOxv8cxdno6b8haACkWxwOmq2xq/TifJ9KZwDtpEG3t1BjLsp59gknvLZCBhoJw/slErIw7B4kVbrDon6mT0Lu2KsBXRxhx/LC7qZCA= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1699885659; c=relaxed/simple; bh=u+ifsj0dIKvodHjXhUZ8DlpDi005Tu59zi41QIA4dKk=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=i3JLHrqvV9UhnQ6t4BBB3LB0Pqpmt5cdPAPUh2C1In0jmthFQA356Dk/7mGQSu++yIItgMPxz7q1eCqMqcpxjM720Bc83cR/LE8tBRFLLeUxVehQhO391RP69KGI7nUSrL2cx6gN+YUj0xFuPVePfoQMzzA6GKpgJFYUJQXOSbU= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 906871007; Mon, 13 Nov 2023 06:28:23 -0800 (PST) Received: from e126323.arm.com (unknown [10.57.41.187]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 75CE43F7B4; Mon, 13 Nov 2023 06:27:37 -0800 (PST) From: Richard Earnshaw To: gcc-patches@gcc.gnu.org Cc: Richard Earnshaw Subject: [committed 20/22] testsuite: arm: tighten up mode-specific ISA tests Date: Mon, 13 Nov 2023 14:26:56 +0000 Message-Id: <20231113142658.69039-21-rearnsha@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231113142658.69039-1-rearnsha@arm.com> References: <20231113142658.69039-1-rearnsha@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-14.0 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Some of the standard Arm architecture tests require the test to use a specific instruction set (arm or thumb). But although the framework was checking that the flag was accepted, it wasn't checking that the flag wasn't somehow being override (eg by run-specific options). We can improve these tests easily by checking whether or not __thumb-_ is defined. gcc/testsuite: * lib/target-supports.exp (check_effective_target_arm_arch_FUNC_ok): For instruction-set specific tests, check that __thumb__ is, or isn't defined as appropriate. --- gcc/testsuite/lib/target-supports.exp | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 316e34a34be..3d504d26164 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -5403,25 +5403,25 @@ proc check_effective_target_arm_fp16_hw { } { foreach { armfunc armflag armdefs } { v4 "-march=armv4 -marm" __ARM_ARCH_4__ v4t "-march=armv4t -mfloat-abi=softfp" __ARM_ARCH_4T__ - v4t_arm "-march=armv4t -marm" __ARM_ARCH_4T__ - v4t_thumb "-march=armv4t -mthumb -mfloat-abi=softfp" __ARM_ARCH_4T__ + v4t_arm "-march=armv4t -marm" "__ARM_ARCH_4T__ && !__thumb__" + v4t_thumb "-march=armv4t -mthumb -mfloat-abi=softfp" "__ARM_ARCH_4T__ && __thumb__" v5t "-march=armv5t -mfloat-abi=softfp" __ARM_ARCH_5T__ - v5t_arm "-march=armv5t -marm" __ARM_ARCH_5T__ - v5t_thumb "-march=armv5t -mthumb -mfloat-abi=softfp" __ARM_ARCH_5T__ + v5t_arm "-march=armv5t -marm" "__ARM_ARCH_5T__ && !__thumb__" + v5t_thumb "-march=armv5t -mthumb -mfloat-abi=softfp" "__ARM_ARCH_5T__ && __thumb__" v5te "-march=armv5te+fp -mfloat-abi=softfp" __ARM_ARCH_5TE__ - v5te_arm "-march=armv5te+fp -marm" __ARM_ARCH_5TE__ - v5te_thumb "-march=armv5te+fp -mthumb -mfloat-abi=softfp" __ARM_ARCH_5TE__ - xscale_arm "-mcpu=xscale -mfloat-abi=soft -marm" __XSCALE__ + v5te_arm "-march=armv5te+fp -marm" "__ARM_ARCH_5TE__ && !__thumb__" + v5te_thumb "-march=armv5te+fp -mthumb -mfloat-abi=softfp" "__ARM_ARCH_5TE__ && __thumb__" + xscale_arm "-mcpu=xscale -mfloat-abi=soft -marm" "__XSCALE__ && !__thumb__" v6 "-march=armv6+fp -mfloat-abi=softfp" __ARM_ARCH_6__ - v6_arm "-march=armv6+fp -marm" __ARM_ARCH_6__ - v6_thumb "-march=armv6+fp -mthumb -mfloat-abi=softfp" __ARM_ARCH_6__ + v6_arm "-march=armv6+fp -marm" "__ARM_ARCH_6__ && !__thumb__" + v6_thumb "-march=armv6+fp -mthumb -mfloat-abi=softfp" "__ARM_ARCH_6__ && __thumb__" v6k "-march=armv6k+fp -mfloat-abi=softfp" __ARM_ARCH_6K__ - v6k_arm "-march=armv6k+fp -marm" __ARM_ARCH_6K__ - v6k_thumb "-march=armv6k+fp -mthumb -mfloat-abi=softfp" __ARM_ARCH_6K__ + v6k_arm "-march=armv6k+fp -marm" "__ARM_ARCH_6K__ && !__thumb__" + v6k_thumb "-march=armv6k+fp -mthumb -mfloat-abi=softfp" "__ARM_ARCH_6K__ && __thumb__" v6t2 "-march=armv6t2+fp" __ARM_ARCH_6T2__ v6z "-march=armv6z+fp -mfloat-abi=softfp" __ARM_ARCH_6Z__ - v6z_arm "-march=armv6z+fp -marm" __ARM_ARCH_6Z__ - v6z_thumb "-march=armv6z+fp -mthumb -mfloat-abi=softfp" __ARM_ARCH_6Z__ + v6z_arm "-march=armv6z+fp -marm" "__ARM_ARCH_6Z__ && !__thumb__" + v6z_thumb "-march=armv6z+fp -mthumb -mfloat-abi=softfp" "__ARM_ARCH_6Z__ && __thumb__" v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__ v7a "-march=armv7-a+fp" __ARM_ARCH_7A__ v7r "-march=armv7-r+fp" __ARM_ARCH_7R__