| Message ID | 20231031004929.1435217-1-patrick@rivosinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | [1/2] RISC-V: Let non-atomic targets use optimized amo loads/stores | expand |
On 10/30/23 18:49, Patrick O'Neill wrote: > Non-atomic targets are currently prevented from using the optimized fencing for > seq_cst load/seq_cst store. This patch removes that constraint. > > gcc/ChangeLog: > > * config/riscv/sync-rvwmo.md (atomic_load_rvwmo<mode>): Remove > TARGET_ATOMIC constraint > (atomic_store_rvwmo<mode>): Ditto. > * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Ditto. > (atomic_store_ztso<mode>): Ditto. > * config/riscv/sync.md (atomic_load<mode>): Ditto. > (atomic_store<mode>): Ditto. OK jeff
On 10/31/23 06:05, Jeff Law wrote: > > > On 10/30/23 18:49, Patrick O'Neill wrote: >> Non-atomic targets are currently prevented from using the optimized >> fencing for >> seq_cst load/seq_cst store. This patch removes that constraint. >> >> gcc/ChangeLog: >> >> * config/riscv/sync-rvwmo.md (atomic_load_rvwmo<mode>): Remove >> TARGET_ATOMIC constraint >> (atomic_store_rvwmo<mode>): Ditto. >> * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Ditto. >> (atomic_store_ztso<mode>): Ditto. >> * config/riscv/sync.md (atomic_load<mode>): Ditto. >> (atomic_store<mode>): Ditto. > OK > jeff Committed Patrick
diff --git a/gcc/config/riscv/sync-rvwmo.md b/gcc/config/riscv/sync-rvwmo.md index cb641ea9ec3..c35eae15334 100644 --- a/gcc/config/riscv/sync-rvwmo.md +++ b/gcc/config/riscv/sync-rvwmo.md @@ -52,7 +52,7 @@ [(match_operand:GPR 1 "memory_operand" "A") (match_operand:SI 2 "const_int_operand")] ;; model UNSPEC_ATOMIC_LOAD))] - "TARGET_ATOMIC && !TARGET_ZTSO" + "!TARGET_ZTSO" { enum memmodel model = (enum memmodel) INTVAL (operands[2]); model = memmodel_base (model); @@ -78,7 +78,7 @@ [(match_operand:GPR 1 "reg_or_0_operand" "rJ") (match_operand:SI 2 "const_int_operand")] ;; model UNSPEC_ATOMIC_STORE))] - "TARGET_ATOMIC && !TARGET_ZTSO" + "!TARGET_ZTSO" { enum memmodel model = (enum memmodel) INTVAL (operands[2]); model = memmodel_base (model); diff --git a/gcc/config/riscv/sync-ztso.md b/gcc/config/riscv/sync-ztso.md index 7bb15b7ab8c..6fdfa912a2c 100644 --- a/gcc/config/riscv/sync-ztso.md +++ b/gcc/config/riscv/sync-ztso.md @@ -46,7 +46,7 @@ [(match_operand:GPR 1 "memory_operand" "A") (match_operand:SI 2 "const_int_operand")] ;; model UNSPEC_ATOMIC_LOAD))] - "TARGET_ATOMIC && TARGET_ZTSO" + "TARGET_ZTSO" { enum memmodel model = (enum memmodel) INTVAL (operands[2]); model = memmodel_base (model); @@ -66,7 +66,7 @@ [(match_operand:GPR 1 "reg_or_0_operand" "rJ") (match_operand:SI 2 "const_int_operand")] ;; model UNSPEC_ATOMIC_STORE))] - "TARGET_ATOMIC && TARGET_ZTSO" + "TARGET_ZTSO" { enum memmodel model = (enum memmodel) INTVAL (operands[2]); model = memmodel_base (model); diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md index 6ff3493b5ce..ec9d4b4f59e 100644 --- a/gcc/config/riscv/sync.md +++ b/gcc/config/riscv/sync.md @@ -60,7 +60,7 @@ [(match_operand:GPR 0 "register_operand") (match_operand:GPR 1 "memory_operand") (match_operand:SI 2 "const_int_operand")] ;; model - "TARGET_ATOMIC" + "" { if (TARGET_ZTSO) emit_insn (gen_atomic_load_ztso<mode> (operands[0], operands[1], @@ -75,7 +75,7 @@ [(match_operand:GPR 0 "memory_operand") (match_operand:GPR 1 "reg_or_0_operand") (match_operand:SI 2 "const_int_operand")] ;; model - "TARGET_ATOMIC" + "" { if (TARGET_ZTSO) emit_insn (gen_atomic_store_ztso<mode> (operands[0], operands[1],
Non-atomic targets are currently prevented from using the optimized fencing for seq_cst load/seq_cst store. This patch removes that constraint. gcc/ChangeLog: * config/riscv/sync-rvwmo.md (atomic_load_rvwmo<mode>): Remove TARGET_ATOMIC constraint (atomic_store_rvwmo<mode>): Ditto. * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Ditto. (atomic_store_ztso<mode>): Ditto. * config/riscv/sync.md (atomic_load<mode>): Ditto. (atomic_store<mode>): Ditto. Signed-off-by: Patrick O'Neill <patrick@rivosinc.com> --- gcc/config/riscv/sync-rvwmo.md | 4 ++-- gcc/config/riscv/sync-ztso.md | 4 ++-- gcc/config/riscv/sync.md | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) -- 2.34.1