From patchwork Mon Jul 17 03:33:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jiang, Haochen" X-Patchwork-Id: 1808533 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=JamTVSn6; dkim-atps=neutral Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4R473h4LJVz20Cs for ; Mon, 17 Jul 2023 13:34:02 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3DC4D3858CDA for ; Mon, 17 Jul 2023 03:34:00 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3DC4D3858CDA DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1689564840; bh=CE0fgcTIO4jo93NLHzTmvN/D0Bzozm9gP0oWY9+1NTM=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=JamTVSn6LbEtC3Tl+4G3Tt3k2uwncQgYD8EiT+5KVFcJK6qoRh4WEVaHO2UJr360M yY2H6wNSx48GLGNIRJqv7imgYUX5Yqi47RVH8E96cCc7cHsiKvPtRiOZeLEVyGaGH+ JJuPqJzUWDgrfzSPKnfnrQIn0uoaT2MltYcDZRCs= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by sourceware.org (Postfix) with ESMTPS id B276C3858D1E for ; Mon, 17 Jul 2023 03:33:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B276C3858D1E X-IronPort-AV: E=McAfee;i="6600,9927,10773"; a="369386743" X-IronPort-AV: E=Sophos;i="6.01,211,1684825200"; d="scan'208";a="369386743" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jul 2023 20:33:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10773"; a="726377552" X-IronPort-AV: E=Sophos;i="6.01,211,1684825200"; d="scan'208";a="726377552" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga007.fm.intel.com with ESMTP; 16 Jul 2023 20:33:35 -0700 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id BA1EB1005170; Mon, 17 Jul 2023 11:33:34 +0800 (CST) To: gcc-patches@gcc.gnu.org Cc: hongtao.liu@intel.com, ubizjak@gmail.com Subject: [PATCH] [gcc-wwwdocs]gcc-13/14: Mention Intel new ISA and march support Date: Mon, 17 Jul 2023 11:33:34 +0800 Message-Id: <20230717033334.2376251-1-haochen.jiang@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Gcc-patches From: "Jiang, Haochen" Reply-To: Haochen Jiang Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi all, This patch adds documentation to wwwdocs to mention the recent introduction of Intel new ISA and march. Ok for trunk? BRs, Haochen --- htdocs/gcc-13/changes.html | 4 ++++ htdocs/gcc-14/changes.html | 34 +++++++++++++++++++++++++++++++++- 2 files changed, 37 insertions(+), 1 deletion(-) diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html index 39414e18..68e8c5cc 100644 --- a/htdocs/gcc-13/changes.html +++ b/htdocs/gcc-13/changes.html @@ -593,6 +593,10 @@ You may also want to check out our
  • GCC now supports the Intel CPU named Granite Rapids through -march=graniterapids. + The switch enables the AMX-FP16, PREFETCHI ISA extensions. +
    • +
  • GCC now supports the Intel CPU named Granite Rapids D through + -march=graniterapids-d. The switch enables the AMX-FP16, PREFETCHI and AMX-COMPLEX ISA extensions.
  • GCC now supports AMD CPUs based on the znver4 core diff --git a/htdocs/gcc-14/changes.html b/htdocs/gcc-14/changes.html index 3f797642..dad1ba53 100644 --- a/htdocs/gcc-14/changes.html +++ b/htdocs/gcc-14/changes.html @@ -108,7 +108,39 @@ a work-in-progress.

    - +

    IA-32/x86-64

    +
      +
    • New ISA extension support for Intel AVX-VNNI-INT16 was added. + AVX-VNNI-INT16 intrinsics are available via the -mavxvnniint16 + compiler switch. +
      • +
    • New ISA extension support for Intel SHA512 was added. + SHA512 intrinsics are available via the -msha512 + compiler switch. +
      • +
    • New ISA extension support for Intel SM3 was added. + SM3 intrinsics are available via the -msm3 + compiler switch. +
      • +
    • New ISA extension support for Intel SM4 was added. + SM4 intrinsics are available via the -msm4 + compiler switch. +
      • +
    • GCC now supports the Intel CPU named Arrow Lake through + -march=arrowlake. + Based on Alder Lake, the switch further enables the AVX-IFMA, + AVX-VNNI-INT8, AVX-NE-CONVERT and CMPccXADD ISA extensions. +
      • +
    • GCC now supports the Intel CPU named Arrow Lake S through + -march=arrowlake-s. + Based on Arrow Lake, the switch further enables the AVX-VNNI-INT16, SHA512, + SM3 and SM4 ISA extensions. +
      • +
    • GCC now supports the Intel CPU named Lunar Lake through + -march=lunarlake. + Lunar Lake is based on Arrow Lake S. +
      • +