From patchwork Thu Jun 8 01:55:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiufu Guo X-Patchwork-Id: 1791966 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=ZRXX3Fwl; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Qc6l52kywz20WP for ; Thu, 8 Jun 2023 11:56:33 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 4EF1B385B528 for ; Thu, 8 Jun 2023 01:56:31 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 4EF1B385B528 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1686189391; bh=vZ8F212OIUzmgKjKuooSozxzpDKNRL3ryNkdmyubneY=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=ZRXX3FwlypnHIbaY50Pik0Sv4twRXonw2Znubd/F23suCxO2iyAUTlsVUQeYULOFX bZK+EGsotE54/2tZXScWWmckKgqYz/Y3bg8AmXpNn52UNN9yFDlyPjbhMqXI3ZScYZ 6Pz69xP/Z0QJWcUVlja2HaVLwhFfA7Y+108gl7wE= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id AD49C3857014; Thu, 8 Jun 2023 01:56:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org AD49C3857014 Received: from pps.filterd (m0353722.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3581lJZE001535; Thu, 8 Jun 2023 01:56:01 GMT Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3r35mhr48h-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 08 Jun 2023 01:56:00 +0000 Received: from m0353722.ppops.net (m0353722.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3581pqkG015321; Thu, 8 Jun 2023 01:56:00 GMT Received: from ppma03ams.nl.ibm.com (62.31.33a9.ip4.static.sl-reverse.com [169.51.49.98]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3r35mhr484-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 08 Jun 2023 01:56:00 +0000 Received: from pps.filterd (ppma03ams.nl.ibm.com [127.0.0.1]) by ppma03ams.nl.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 357MWKei022262; Thu, 8 Jun 2023 01:55:58 GMT Received: from smtprelay05.fra02v.mail.ibm.com ([9.218.2.225]) by ppma03ams.nl.ibm.com (PPS) with ESMTPS id 3r2a768yxb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 08 Jun 2023 01:55:58 +0000 Received: from smtpav01.fra02v.mail.ibm.com (smtpav01.fra02v.mail.ibm.com [10.20.54.100]) by smtprelay05.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 3581tscl21955242 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 8 Jun 2023 01:55:55 GMT Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DC1EF20043; Thu, 8 Jun 2023 01:55:54 +0000 (GMT) Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C6C4F20040; Thu, 8 Jun 2023 01:55:53 +0000 (GMT) Received: from ltcden2-lp1.aus.stglabs.ibm.com (unknown [9.3.90.43]) by smtpav01.fra02v.mail.ibm.com (Postfix) with ESMTP; Thu, 8 Jun 2023 01:55:53 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, dje.gcc@gmail.com, linkw@gcc.gnu.org, bergner@linux.ibm.com, guojiufu@linux.ibm.com Subject: [PATCH 4/4] rs6000: build constant via li/lis;rldic Date: Thu, 8 Jun 2023 09:55:47 +0800 Message-Id: <20230608015547.3432691-5-guojiufu@linux.ibm.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230608015547.3432691-1-guojiufu@linux.ibm.com> References: <20230608015547.3432691-1-guojiufu@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 2xeAJasxACbMGn6OTsK6fz8BS5mFnwj2 X-Proofpoint-GUID: CwCrgwGMEIgJwC8G10bssfbkpZUFjd9q X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-07_13,2023-06-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 lowpriorityscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 spamscore=0 adultscore=0 phishscore=0 suspectscore=0 bulkscore=0 clxscore=1015 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2306080010 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jiufu Guo via Gcc-patches From: Jiufu Guo Reply-To: Jiufu Guo Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi, This patch checks if a constant is possible to be built by "li;rldic". We only need to take care of "negative li", other forms do not need to check. For example, "negative lis" is just a "negative li" with an additional shift. Bootstrap and regtest pass on ppc64{,le}. Is this ok for trunk? BR, Jeff (Jiufu) gcc/ChangeLog: * config/rs6000/rs6000.cc (can_be_built_by_li_and_rldic): New function. (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rldic. gcc/testsuite/ChangeLog: * gcc.target/powerpc/const-build.c: Add more tests. --- gcc/config/rs6000/rs6000.cc | 61 ++++++++++++++++++- .../gcc.target/powerpc/const-build.c | 28 +++++++++ 2 files changed, 88 insertions(+), 1 deletion(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 2a3fa733b45..cd04b6b5c82 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -10387,6 +10387,64 @@ can_be_built_by_li_lis_and_rldicr (HOST_WIDE_INT c, int *shift, return false; } +/* Check if value C can be built by 2 instructions: one is 'li', another is + rldic. + + If so, *SHIFT is set to the 'shift' operand of rldic; and *MASK is set + to the mask value about the 'mb' operand of rldic; and return true. + Return false otherwise. */ + +static bool +can_be_built_by_li_and_rldic (HOST_WIDE_INT c, int *shift, HOST_WIDE_INT *mask) +{ + /* There are 49 successive ones in the negative value of 'li'. */ + int ones = 49; + + /* 1..1xx1..1: negative value of li --> 0..01..1xx0..0: + right bits are shifted as 0's, and left 1's(and x's) are cleaned. */ + int tz = ctz_hwi (c); + int lz = clz_hwi (c); + int middle_ones = clz_hwi (~(c << lz)); + if (tz + lz + middle_ones >= ones) + { + *mask = ((1LL << (HOST_BITS_PER_WIDE_INT - tz - lz)) - 1LL) << tz; + *shift = tz; + return true; + } + + /* 1..1xx1..1 --> 1..1xx0..01..1: some 1's(following x's) are cleaned. */ + int leading_ones = clz_hwi (~c); + int tailing_ones = ctz_hwi (~c); + int middle_zeros = ctz_hwi (c >> tailing_ones); + if (leading_ones + tailing_ones + middle_zeros >= ones) + { + *mask = ~(((1ULL << middle_zeros) - 1ULL) << tailing_ones); + *shift = tailing_ones + middle_zeros; + return true; + } + + /* xx1..1xx: --> xx0..01..1xx: some 1's(following x's) are cleaned. */ + /* Get the position for the first bit of successive 1. + The 24th bit would be in successive 0 or 1. */ + HOST_WIDE_INT low_mask = (1LL << 24) - 1LL; + int pos_first_1 = ((c & (low_mask + 1)) == 0) + ? clz_hwi (c & low_mask) + : HOST_BITS_PER_WIDE_INT - ctz_hwi (~(c | low_mask)); + middle_ones = clz_hwi (~c << pos_first_1); + middle_zeros = ctz_hwi (c >> (HOST_BITS_PER_WIDE_INT - pos_first_1)); + if (pos_first_1 < HOST_BITS_PER_WIDE_INT + && middle_ones + middle_zeros < HOST_BITS_PER_WIDE_INT + && middle_ones + middle_zeros >= ones) + { + *mask = ~(((1ULL << middle_zeros) - 1LL) + << (HOST_BITS_PER_WIDE_INT - pos_first_1)); + *shift = HOST_BITS_PER_WIDE_INT - pos_first_1 + middle_zeros; + return true; + } + + return false; +} + /* Subroutine of rs6000_emit_set_const, handling PowerPC64 DImode. Output insns to set DEST equal to the constant C as a series of lis, ori and shl instructions. */ @@ -10435,7 +10493,8 @@ rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c) } else if (can_be_built_by_li_lis_and_rotldi (c, &shift, &mask) || can_be_built_by_li_lis_and_rldicl (c, &shift, &mask) - || can_be_built_by_li_lis_and_rldicr (c, &shift, &mask)) + || can_be_built_by_li_lis_and_rldicr (c, &shift, &mask) + || can_be_built_by_li_and_rldic (c, &shift, &mask)) { temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode); unsigned HOST_WIDE_INT imm = (c | ~mask); diff --git a/gcc/testsuite/gcc.target/powerpc/const-build.c b/gcc/testsuite/gcc.target/powerpc/const-build.c index 8c209921d41..b503ee31c7c 100644 --- a/gcc/testsuite/gcc.target/powerpc/const-build.c +++ b/gcc/testsuite/gcc.target/powerpc/const-build.c @@ -82,6 +82,29 @@ lis_rldicr_12 (void) return 0x5310000ffffffff0LL; } +long long NOIPA +li_rldic_13 (void) +{ + return 0x000f853100000000LL; +} +long long NOIPA +li_rldic_14 (void) +{ + return 0xffff853100ffffffLL; +} + +long long NOIPA +li_rldic_15 (void) +{ + return 0x800000ffffffff31LL; +} + +long long NOIPA +li_rldic_16 (void) +{ + return 0x800000000fffff31LL; +} + struct fun arr[] = { {li_rotldi_1, 0x7531000000000LL}, {li_rotldi_2, 0x2100000000000064LL}, @@ -95,11 +118,16 @@ struct fun arr[] = { {li_rldicr_10, 0xffff8531fff00000LL}, {li_rldicr_11, 0x21fffffffff00000LL}, {lis_rldicr_12, 0x5310000ffffffff0LL}, + {li_rldic_13, 0x000f853100000000LL}, + {li_rldic_14, 0xffff853100ffffffLL}, + {li_rldic_15, 0x800000ffffffff31LL}, + {li_rldic_16, 0x800000000fffff31LL} }; /* { dg-final { scan-assembler-times {\mrotldi\M} 6 } } */ /* { dg-final { scan-assembler-times {\mrldicl\M} 3 } } */ /* { dg-final { scan-assembler-times {\mrldicr\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mrldic\M} 4 } } */ int main ()