Message ID | 20230420035821.4113007-1-hongtao.liu@intel.com |
---|---|
State | New |
Headers | show |
Series | Canonicalize vec_merge when mask is constant. | expand |
On 4/19/23 21:58, liuhongt via Gcc-patches wrote: > Use swap_communattive_operands_p for canonicalization. When both value > has same operand precedence value, then first bit in the mask should > select first operand. > > The canonicalization should help backends for pattern match. .i.e. x86 > backend has lots of vec_merge patterns, combine will create any form > of vec_merge(mask, or inverted mask), then backend need to add 2 > patterns to match exact 1 instruction. The canonicalization can > simplify 2 patterns to 1. > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}, aarch64-linux-gnu. > Ok for trunk? > > gcc/ChangeLog: > > * combine.cc (maybe_swap_commutative_operands): Canonicalize > vec_merge when mask is constant. ISTM that if we're going to call this the canonical form, then we should document it in rtl.texi. Otherwise it looks pretty good to me. So let's get the docs updated and get this installed. jeff
On Mon, May 1, 2023 at 3:37 AM Jeff Law <jeffreyalaw@gmail.com> wrote: > > > > On 4/19/23 21:58, liuhongt via Gcc-patches wrote: > > Use swap_communattive_operands_p for canonicalization. When both value > > has same operand precedence value, then first bit in the mask should > > select first operand. > > > > The canonicalization should help backends for pattern match. .i.e. x86 > > backend has lots of vec_merge patterns, combine will create any form > > of vec_merge(mask, or inverted mask), then backend need to add 2 > > patterns to match exact 1 instruction. The canonicalization can > > simplify 2 patterns to 1. > > > > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}, aarch64-linux-gnu. > > Ok for trunk? > > > > gcc/ChangeLog: > > > > * combine.cc (maybe_swap_commutative_operands): Canonicalize > > vec_merge when mask is constant. > ISTM that if we're going to call this the canonical form, then we should > document it in rtl.texi. Yes., how about the wording: 1 file changed, 7 insertions(+) gcc/doc/md.texi | 7 +++++++ modified gcc/doc/md.texi @@ -8215,6 +8215,13 @@ second operand. If a machine only supports a constant as the second operand, only patterns that match a constant in the second operand need be supplied. +@cindex @code{vec_merge}, canonicalization of +@item +For the @code{vec_merge} with constant mask(the third operand), the first +and the second operand can be exchanged by inverting the mask. In such cases, +a constant is always made the second operand, otherwise the least significant +bit of the mask is always set(select the first operand first). + @item For associative operators, a sequence of operators will always chain to the left; for instance, only the left operand of an integer @code{plus} > > Otherwise it looks pretty good to me. So let's get the docs updated and > get this installed. > > jeff
diff --git a/gcc/combine.cc b/gcc/combine.cc index 0106092e456..5aa0ec5c45a 100644 --- a/gcc/combine.cc +++ b/gcc/combine.cc @@ -5631,6 +5631,28 @@ maybe_swap_commutative_operands (rtx x) SUBST (XEXP (x, 0), XEXP (x, 1)); SUBST (XEXP (x, 1), temp); } + + unsigned n_elts = 0; + if (GET_CODE (x) == VEC_MERGE + && CONST_INT_P (XEXP (x, 2)) + && GET_MODE_NUNITS (GET_MODE (x)).is_constant (&n_elts) + && (swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1)) + /* Two operands have same precedence, then + first bit of mask select first operand. */ + || (!swap_commutative_operands_p (XEXP (x, 1), XEXP (x, 0)) + && !(UINTVAL (XEXP (x, 2)) & 1)))) + { + rtx temp = XEXP (x, 0); + unsigned HOST_WIDE_INT sel = UINTVAL (XEXP (x, 2)); + unsigned HOST_WIDE_INT mask = HOST_WIDE_INT_1U; + if (n_elts == HOST_BITS_PER_WIDE_INT) + mask = -1; + else + mask = (HOST_WIDE_INT_1U << n_elts) - 1; + SUBST (XEXP (x, 0), XEXP (x, 1)); + SUBST (XEXP (x, 1), temp); + SUBST (XEXP (x, 2), GEN_INT (~sel & mask)); + } } /* Simplify X, a piece of RTL. We just operate on the expression at the