diff mbox series

[committed] RISC-V: Make the test condition more strict for gcc.target/riscv/_Float16-zhinxmin-1.c

Message ID 20230222122114.47958-1-kito.cheng@sifive.com
State New
Headers show
Series [committed] RISC-V: Make the test condition more strict for gcc.target/riscv/_Float16-zhinxmin-1.c | expand

Commit Message

Kito Cheng Feb. 22, 2023, 12:21 p.m. UTC 
LTO might generate random string for the section name, which might contain `mv`,
then might cause random false alarm.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/_Float16-zhinxmin-1.c: Tweak test
	condition.
---
 gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c
index 0070ebf616c..fa049db5b93 100644
--- a/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c
+++ b/gcc/testsuite/gcc.target/riscv/_Float16-zhinxmin-1.c
@@ -5,6 +5,6 @@  _Float16 foo1 (_Float16 a, _Float16 b)
 {
     /* { dg-final { scan-assembler-not "fmv.h" } } */
     /* { dg-final { scan-assembler-not "fmv.s" } } */
-    /* { dg-final { scan-assembler-times "mv" 1 } } */
+    /* { dg-final { scan-assembler-times "mv\ta0" 1 } } */
     return b;
 }