From patchwork Thu Jan 19 14:31:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?6ZKf5bGF5ZOy?= X-Patchwork-Id: 1728964 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4NyQ7660fGz23fT for ; Fri, 20 Jan 2023 01:31:45 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C64B5385B522 for ; Thu, 19 Jan 2023 14:31:42 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbgbr2.qq.com (smtpbgbr2.qq.com [54.207.22.56]) by sourceware.org (Postfix) with ESMTPS id 39BFD3858D39 for ; Thu, 19 Jan 2023 14:31:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 39BFD3858D39 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp66t1674138673t7o89y1v Received: from rios-cad5.localdomain ( [58.60.1.11]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 19 Jan 2023 22:31:12 +0800 (CST) X-QQ-SSF: 01400000002000E0L000B00A0000000 X-QQ-FEAT: D6RqbDSxuq48h9isU7zfDuX3wI0c4TmSg6P2/umlXCehTHlxsESYqLNpWa4BH JgCixm29dkOFhKoeEXfmWfQesK9nlCRRflDbJp44bxdzlyjvwa+/lkBgf1VED6vFpX/0qk4 A2/VcbSVQLuMCns6QacamDYCoIdkhtJ8XShwiRaYq6qBy7SQBoqgmW5WLxFklAUgKess/6t wL3hkRS3HZ1PzxoT/mBqRY93nbsmxfp1YYeyiz0Rpg6xtxsrC7xeoDEXJLGXZpTSDSQEj3x T636m9kMyFo12wfAHS+EAxGsUTC2kSzCHKxf7O5n6lRsDH0OByQEGLR+C1lzhnYE4EysMuw oNXYjnv+1vqjRYjkBpZmkJXF86i5TIdnY4bOKdeM81f5+y2yc0xdZFAmChz1g0sZZ7YKCNl X-QQ-GoodBg: 2 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, Ju-Zhe Zhong Subject: [PATCH] RISC-V: Add vse.v C API intrinsics testcases Date: Thu, 19 Jan 2023 22:31:08 +0800 Message-Id: <20230119143108.314789-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvr:qybglogicsvr7 X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" From: Ju-Zhe Zhong gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/vse-1.c: New test. * gcc.target/riscv/rvv/base/vse-2.c: New test. * gcc.target/riscv/rvv/base/vse-3.c: New test. * gcc.target/riscv/rvv/base/vse_m-1.c: New test. * gcc.target/riscv/rvv/base/vse_m-2.c: New test. * gcc.target/riscv/rvv/base/vse_m-3.c: New test. --- .../gcc.target/riscv/rvv/base/vse-1.c | 345 ++++++++++++++++++ .../gcc.target/riscv/rvv/base/vse-2.c | 345 ++++++++++++++++++ .../gcc.target/riscv/rvv/base/vse-3.c | 345 ++++++++++++++++++ .../gcc.target/riscv/rvv/base/vse_m-1.c | 345 ++++++++++++++++++ .../gcc.target/riscv/rvv/base/vse_m-2.c | 345 ++++++++++++++++++ .../gcc.target/riscv/rvv/base/vse_m-3.c | 345 ++++++++++++++++++ 6 files changed, 2070 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vse-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vse-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vse-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-3.c diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vse-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vse-1.c new file mode 100644 index 00000000000..c08e1e1265a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vse-1.c @@ -0,0 +1,345 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +void +test___riscv_vse8_v_i8mf8(int8_t* base,vint8mf8_t value,size_t vl) +{ + __riscv_vse8_v_i8mf8(base,value,vl); +} + +void +test___riscv_vse8_v_i8mf4(int8_t* base,vint8mf4_t value,size_t vl) +{ + __riscv_vse8_v_i8mf4(base,value,vl); +} + +void +test___riscv_vse8_v_i8mf2(int8_t* base,vint8mf2_t value,size_t vl) +{ + __riscv_vse8_v_i8mf2(base,value,vl); +} + +void +test___riscv_vse8_v_i8m1(int8_t* base,vint8m1_t value,size_t vl) +{ + __riscv_vse8_v_i8m1(base,value,vl); +} + +void +test___riscv_vse8_v_i8m2(int8_t* base,vint8m2_t value,size_t vl) +{ + __riscv_vse8_v_i8m2(base,value,vl); +} + +void +test___riscv_vse8_v_i8m4(int8_t* base,vint8m4_t value,size_t vl) +{ + __riscv_vse8_v_i8m4(base,value,vl); +} + +void +test___riscv_vse8_v_i8m8(int8_t* base,vint8m8_t value,size_t vl) +{ + __riscv_vse8_v_i8m8(base,value,vl); +} + +void +test___riscv_vse8_v_u8mf8(uint8_t* base,vuint8mf8_t value,size_t vl) +{ + __riscv_vse8_v_u8mf8(base,value,vl); +} + +void +test___riscv_vse8_v_u8mf4(uint8_t* base,vuint8mf4_t value,size_t vl) +{ + __riscv_vse8_v_u8mf4(base,value,vl); +} + +void +test___riscv_vse8_v_u8mf2(uint8_t* base,vuint8mf2_t value,size_t vl) +{ + __riscv_vse8_v_u8mf2(base,value,vl); +} + +void +test___riscv_vse8_v_u8m1(uint8_t* base,vuint8m1_t value,size_t vl) +{ + __riscv_vse8_v_u8m1(base,value,vl); +} + +void +test___riscv_vse8_v_u8m2(uint8_t* base,vuint8m2_t value,size_t vl) +{ + __riscv_vse8_v_u8m2(base,value,vl); +} + +void +test___riscv_vse8_v_u8m4(uint8_t* base,vuint8m4_t value,size_t vl) +{ + __riscv_vse8_v_u8m4(base,value,vl); +} + +void +test___riscv_vse8_v_u8m8(uint8_t* base,vuint8m8_t value,size_t vl) +{ + __riscv_vse8_v_u8m8(base,value,vl); +} + +void +test___riscv_vse16_v_i16mf4(int16_t* base,vint16mf4_t value,size_t vl) +{ + __riscv_vse16_v_i16mf4(base,value,vl); +} + +void +test___riscv_vse16_v_i16mf2(int16_t* base,vint16mf2_t value,size_t vl) +{ + __riscv_vse16_v_i16mf2(base,value,vl); +} + +void +test___riscv_vse16_v_i16m1(int16_t* base,vint16m1_t value,size_t vl) +{ + __riscv_vse16_v_i16m1(base,value,vl); +} + +void +test___riscv_vse16_v_i16m2(int16_t* base,vint16m2_t value,size_t vl) +{ + __riscv_vse16_v_i16m2(base,value,vl); +} + +void +test___riscv_vse16_v_i16m4(int16_t* base,vint16m4_t value,size_t vl) +{ + __riscv_vse16_v_i16m4(base,value,vl); +} + +void +test___riscv_vse16_v_i16m8(int16_t* base,vint16m8_t value,size_t vl) +{ + __riscv_vse16_v_i16m8(base,value,vl); +} + +void +test___riscv_vse16_v_u16mf4(uint16_t* base,vuint16mf4_t value,size_t vl) +{ + __riscv_vse16_v_u16mf4(base,value,vl); +} + +void +test___riscv_vse16_v_u16mf2(uint16_t* base,vuint16mf2_t value,size_t vl) +{ + __riscv_vse16_v_u16mf2(base,value,vl); +} + +void +test___riscv_vse16_v_u16m1(uint16_t* base,vuint16m1_t value,size_t vl) +{ + __riscv_vse16_v_u16m1(base,value,vl); +} + +void +test___riscv_vse16_v_u16m2(uint16_t* base,vuint16m2_t value,size_t vl) +{ + __riscv_vse16_v_u16m2(base,value,vl); +} + +void +test___riscv_vse16_v_u16m4(uint16_t* base,vuint16m4_t value,size_t vl) +{ + __riscv_vse16_v_u16m4(base,value,vl); +} + +void +test___riscv_vse16_v_u16m8(uint16_t* base,vuint16m8_t value,size_t vl) +{ + __riscv_vse16_v_u16m8(base,value,vl); +} + +void +test___riscv_vse32_v_i32mf2(int32_t* base,vint32mf2_t value,size_t vl) +{ + __riscv_vse32_v_i32mf2(base,value,vl); +} + +void +test___riscv_vse32_v_i32m1(int32_t* base,vint32m1_t value,size_t vl) +{ + __riscv_vse32_v_i32m1(base,value,vl); +} + +void +test___riscv_vse32_v_i32m2(int32_t* base,vint32m2_t value,size_t vl) +{ + __riscv_vse32_v_i32m2(base,value,vl); +} + +void +test___riscv_vse32_v_i32m4(int32_t* base,vint32m4_t value,size_t vl) +{ + __riscv_vse32_v_i32m4(base,value,vl); +} + +void +test___riscv_vse32_v_i32m8(int32_t* base,vint32m8_t value,size_t vl) +{ + __riscv_vse32_v_i32m8(base,value,vl); +} + +void +test___riscv_vse32_v_u32mf2(uint32_t* base,vuint32mf2_t value,size_t vl) +{ + __riscv_vse32_v_u32mf2(base,value,vl); +} + +void +test___riscv_vse32_v_u32m1(uint32_t* base,vuint32m1_t value,size_t vl) +{ + __riscv_vse32_v_u32m1(base,value,vl); +} + +void +test___riscv_vse32_v_u32m2(uint32_t* base,vuint32m2_t value,size_t vl) +{ + __riscv_vse32_v_u32m2(base,value,vl); +} + +void +test___riscv_vse32_v_u32m4(uint32_t* base,vuint32m4_t value,size_t vl) +{ + __riscv_vse32_v_u32m4(base,value,vl); +} + +void +test___riscv_vse32_v_u32m8(uint32_t* base,vuint32m8_t value,size_t vl) +{ + __riscv_vse32_v_u32m8(base,value,vl); +} + +void +test___riscv_vse32_v_f32mf2(float* base,vfloat32mf2_t value,size_t vl) +{ + __riscv_vse32_v_f32mf2(base,value,vl); +} + +void +test___riscv_vse32_v_f32m1(float* base,vfloat32m1_t value,size_t vl) +{ + __riscv_vse32_v_f32m1(base,value,vl); +} + +void +test___riscv_vse32_v_f32m2(float* base,vfloat32m2_t value,size_t vl) +{ + __riscv_vse32_v_f32m2(base,value,vl); +} + +void +test___riscv_vse32_v_f32m4(float* base,vfloat32m4_t value,size_t vl) +{ + __riscv_vse32_v_f32m4(base,value,vl); +} + +void +test___riscv_vse32_v_f32m8(float* base,vfloat32m8_t value,size_t vl) +{ + __riscv_vse32_v_f32m8(base,value,vl); +} + +void +test___riscv_vse64_v_i64m1(int64_t* base,vint64m1_t value,size_t vl) +{ + __riscv_vse64_v_i64m1(base,value,vl); +} + +void +test___riscv_vse64_v_i64m2(int64_t* base,vint64m2_t value,size_t vl) +{ + __riscv_vse64_v_i64m2(base,value,vl); +} + +void +test___riscv_vse64_v_i64m4(int64_t* base,vint64m4_t value,size_t vl) +{ + __riscv_vse64_v_i64m4(base,value,vl); +} + +void +test___riscv_vse64_v_i64m8(int64_t* base,vint64m8_t value,size_t vl) +{ + __riscv_vse64_v_i64m8(base,value,vl); +} + +void +test___riscv_vse64_v_u64m1(uint64_t* base,vuint64m1_t value,size_t vl) +{ + __riscv_vse64_v_u64m1(base,value,vl); +} + +void +test___riscv_vse64_v_u64m2(uint64_t* base,vuint64m2_t value,size_t vl) +{ + __riscv_vse64_v_u64m2(base,value,vl); +} + +void +test___riscv_vse64_v_u64m4(uint64_t* base,vuint64m4_t value,size_t vl) +{ + __riscv_vse64_v_u64m4(base,value,vl); +} + +void +test___riscv_vse64_v_u64m8(uint64_t* base,vuint64m8_t value,size_t vl) +{ + __riscv_vse64_v_u64m8(base,value,vl); +} + +void +test___riscv_vse64_v_f64m1(double* base,vfloat64m1_t value,size_t vl) +{ + __riscv_vse64_v_f64m1(base,value,vl); +} + +void +test___riscv_vse64_v_f64m2(double* base,vfloat64m2_t value,size_t vl) +{ + __riscv_vse64_v_f64m2(base,value,vl); +} + +void +test___riscv_vse64_v_f64m4(double* base,vfloat64m4_t value,size_t vl) +{ + __riscv_vse64_v_f64m4(base,value,vl); +} + +void +test___riscv_vse64_v_f64m8(double* base,vfloat64m8_t value,size_t vl) +{ + __riscv_vse64_v_f64m8(base,value,vl); +} + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vse-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vse-2.c new file mode 100644 index 00000000000..62935c56df7 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vse-2.c @@ -0,0 +1,345 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +void +test___riscv_vse8_v_i8mf8(int8_t* base,vint8mf8_t value,size_t vl) +{ + __riscv_vse8_v_i8mf8(base,value,31); +} + +void +test___riscv_vse8_v_i8mf4(int8_t* base,vint8mf4_t value,size_t vl) +{ + __riscv_vse8_v_i8mf4(base,value,31); +} + +void +test___riscv_vse8_v_i8mf2(int8_t* base,vint8mf2_t value,size_t vl) +{ + __riscv_vse8_v_i8mf2(base,value,31); +} + +void +test___riscv_vse8_v_i8m1(int8_t* base,vint8m1_t value,size_t vl) +{ + __riscv_vse8_v_i8m1(base,value,31); +} + +void +test___riscv_vse8_v_i8m2(int8_t* base,vint8m2_t value,size_t vl) +{ + __riscv_vse8_v_i8m2(base,value,31); +} + +void +test___riscv_vse8_v_i8m4(int8_t* base,vint8m4_t value,size_t vl) +{ + __riscv_vse8_v_i8m4(base,value,31); +} + +void +test___riscv_vse8_v_i8m8(int8_t* base,vint8m8_t value,size_t vl) +{ + __riscv_vse8_v_i8m8(base,value,31); +} + +void +test___riscv_vse8_v_u8mf8(uint8_t* base,vuint8mf8_t value,size_t vl) +{ + __riscv_vse8_v_u8mf8(base,value,31); +} + +void +test___riscv_vse8_v_u8mf4(uint8_t* base,vuint8mf4_t value,size_t vl) +{ + __riscv_vse8_v_u8mf4(base,value,31); +} + +void +test___riscv_vse8_v_u8mf2(uint8_t* base,vuint8mf2_t value,size_t vl) +{ + __riscv_vse8_v_u8mf2(base,value,31); +} + +void +test___riscv_vse8_v_u8m1(uint8_t* base,vuint8m1_t value,size_t vl) +{ + __riscv_vse8_v_u8m1(base,value,31); +} + +void +test___riscv_vse8_v_u8m2(uint8_t* base,vuint8m2_t value,size_t vl) +{ + __riscv_vse8_v_u8m2(base,value,31); +} + +void +test___riscv_vse8_v_u8m4(uint8_t* base,vuint8m4_t value,size_t vl) +{ + __riscv_vse8_v_u8m4(base,value,31); +} + +void +test___riscv_vse8_v_u8m8(uint8_t* base,vuint8m8_t value,size_t vl) +{ + __riscv_vse8_v_u8m8(base,value,31); +} + +void +test___riscv_vse16_v_i16mf4(int16_t* base,vint16mf4_t value,size_t vl) +{ + __riscv_vse16_v_i16mf4(base,value,31); +} + +void +test___riscv_vse16_v_i16mf2(int16_t* base,vint16mf2_t value,size_t vl) +{ + __riscv_vse16_v_i16mf2(base,value,31); +} + +void +test___riscv_vse16_v_i16m1(int16_t* base,vint16m1_t value,size_t vl) +{ + __riscv_vse16_v_i16m1(base,value,31); +} + +void +test___riscv_vse16_v_i16m2(int16_t* base,vint16m2_t value,size_t vl) +{ + __riscv_vse16_v_i16m2(base,value,31); +} + +void +test___riscv_vse16_v_i16m4(int16_t* base,vint16m4_t value,size_t vl) +{ + __riscv_vse16_v_i16m4(base,value,31); +} + +void +test___riscv_vse16_v_i16m8(int16_t* base,vint16m8_t value,size_t vl) +{ + __riscv_vse16_v_i16m8(base,value,31); +} + +void +test___riscv_vse16_v_u16mf4(uint16_t* base,vuint16mf4_t value,size_t vl) +{ + __riscv_vse16_v_u16mf4(base,value,31); +} + +void +test___riscv_vse16_v_u16mf2(uint16_t* base,vuint16mf2_t value,size_t vl) +{ + __riscv_vse16_v_u16mf2(base,value,31); +} + +void +test___riscv_vse16_v_u16m1(uint16_t* base,vuint16m1_t value,size_t vl) +{ + __riscv_vse16_v_u16m1(base,value,31); +} + +void +test___riscv_vse16_v_u16m2(uint16_t* base,vuint16m2_t value,size_t vl) +{ + __riscv_vse16_v_u16m2(base,value,31); +} + +void +test___riscv_vse16_v_u16m4(uint16_t* base,vuint16m4_t value,size_t vl) +{ + __riscv_vse16_v_u16m4(base,value,31); +} + +void +test___riscv_vse16_v_u16m8(uint16_t* base,vuint16m8_t value,size_t vl) +{ + __riscv_vse16_v_u16m8(base,value,31); +} + +void +test___riscv_vse32_v_i32mf2(int32_t* base,vint32mf2_t value,size_t vl) +{ + __riscv_vse32_v_i32mf2(base,value,31); +} + +void +test___riscv_vse32_v_i32m1(int32_t* base,vint32m1_t value,size_t vl) +{ + __riscv_vse32_v_i32m1(base,value,31); +} + +void +test___riscv_vse32_v_i32m2(int32_t* base,vint32m2_t value,size_t vl) +{ + __riscv_vse32_v_i32m2(base,value,31); +} + +void +test___riscv_vse32_v_i32m4(int32_t* base,vint32m4_t value,size_t vl) +{ + __riscv_vse32_v_i32m4(base,value,31); +} + +void +test___riscv_vse32_v_i32m8(int32_t* base,vint32m8_t value,size_t vl) +{ + __riscv_vse32_v_i32m8(base,value,31); +} + +void +test___riscv_vse32_v_u32mf2(uint32_t* base,vuint32mf2_t value,size_t vl) +{ + __riscv_vse32_v_u32mf2(base,value,31); +} + +void +test___riscv_vse32_v_u32m1(uint32_t* base,vuint32m1_t value,size_t vl) +{ + __riscv_vse32_v_u32m1(base,value,31); +} + +void +test___riscv_vse32_v_u32m2(uint32_t* base,vuint32m2_t value,size_t vl) +{ + __riscv_vse32_v_u32m2(base,value,31); +} + +void +test___riscv_vse32_v_u32m4(uint32_t* base,vuint32m4_t value,size_t vl) +{ + __riscv_vse32_v_u32m4(base,value,31); +} + +void +test___riscv_vse32_v_u32m8(uint32_t* base,vuint32m8_t value,size_t vl) +{ + __riscv_vse32_v_u32m8(base,value,31); +} + +void +test___riscv_vse32_v_f32mf2(float* base,vfloat32mf2_t value,size_t vl) +{ + __riscv_vse32_v_f32mf2(base,value,31); +} + +void +test___riscv_vse32_v_f32m1(float* base,vfloat32m1_t value,size_t vl) +{ + __riscv_vse32_v_f32m1(base,value,31); +} + +void +test___riscv_vse32_v_f32m2(float* base,vfloat32m2_t value,size_t vl) +{ + __riscv_vse32_v_f32m2(base,value,31); +} + +void +test___riscv_vse32_v_f32m4(float* base,vfloat32m4_t value,size_t vl) +{ + __riscv_vse32_v_f32m4(base,value,31); +} + +void +test___riscv_vse32_v_f32m8(float* base,vfloat32m8_t value,size_t vl) +{ + __riscv_vse32_v_f32m8(base,value,31); +} + +void +test___riscv_vse64_v_i64m1(int64_t* base,vint64m1_t value,size_t vl) +{ + __riscv_vse64_v_i64m1(base,value,31); +} + +void +test___riscv_vse64_v_i64m2(int64_t* base,vint64m2_t value,size_t vl) +{ + __riscv_vse64_v_i64m2(base,value,31); +} + +void +test___riscv_vse64_v_i64m4(int64_t* base,vint64m4_t value,size_t vl) +{ + __riscv_vse64_v_i64m4(base,value,31); +} + +void +test___riscv_vse64_v_i64m8(int64_t* base,vint64m8_t value,size_t vl) +{ + __riscv_vse64_v_i64m8(base,value,31); +} + +void +test___riscv_vse64_v_u64m1(uint64_t* base,vuint64m1_t value,size_t vl) +{ + __riscv_vse64_v_u64m1(base,value,31); +} + +void +test___riscv_vse64_v_u64m2(uint64_t* base,vuint64m2_t value,size_t vl) +{ + __riscv_vse64_v_u64m2(base,value,31); +} + +void +test___riscv_vse64_v_u64m4(uint64_t* base,vuint64m4_t value,size_t vl) +{ + __riscv_vse64_v_u64m4(base,value,31); +} + +void +test___riscv_vse64_v_u64m8(uint64_t* base,vuint64m8_t value,size_t vl) +{ + __riscv_vse64_v_u64m8(base,value,31); +} + +void +test___riscv_vse64_v_f64m1(double* base,vfloat64m1_t value,size_t vl) +{ + __riscv_vse64_v_f64m1(base,value,31); +} + +void +test___riscv_vse64_v_f64m2(double* base,vfloat64m2_t value,size_t vl) +{ + __riscv_vse64_v_f64m2(base,value,31); +} + +void +test___riscv_vse64_v_f64m4(double* base,vfloat64m4_t value,size_t vl) +{ + __riscv_vse64_v_f64m4(base,value,31); +} + +void +test___riscv_vse64_v_f64m8(double* base,vfloat64m8_t value,size_t vl) +{ + __riscv_vse64_v_f64m8(base,value,31); +} + +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vse-3.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vse-3.c new file mode 100644 index 00000000000..c06931b46b4 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vse-3.c @@ -0,0 +1,345 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +void +test___riscv_vse8_v_i8mf8(int8_t* base,vint8mf8_t value,size_t vl) +{ + __riscv_vse8_v_i8mf8(base,value,32); +} + +void +test___riscv_vse8_v_i8mf4(int8_t* base,vint8mf4_t value,size_t vl) +{ + __riscv_vse8_v_i8mf4(base,value,32); +} + +void +test___riscv_vse8_v_i8mf2(int8_t* base,vint8mf2_t value,size_t vl) +{ + __riscv_vse8_v_i8mf2(base,value,32); +} + +void +test___riscv_vse8_v_i8m1(int8_t* base,vint8m1_t value,size_t vl) +{ + __riscv_vse8_v_i8m1(base,value,32); +} + +void +test___riscv_vse8_v_i8m2(int8_t* base,vint8m2_t value,size_t vl) +{ + __riscv_vse8_v_i8m2(base,value,32); +} + +void +test___riscv_vse8_v_i8m4(int8_t* base,vint8m4_t value,size_t vl) +{ + __riscv_vse8_v_i8m4(base,value,32); +} + +void +test___riscv_vse8_v_i8m8(int8_t* base,vint8m8_t value,size_t vl) +{ + __riscv_vse8_v_i8m8(base,value,32); +} + +void +test___riscv_vse8_v_u8mf8(uint8_t* base,vuint8mf8_t value,size_t vl) +{ + __riscv_vse8_v_u8mf8(base,value,32); +} + +void +test___riscv_vse8_v_u8mf4(uint8_t* base,vuint8mf4_t value,size_t vl) +{ + __riscv_vse8_v_u8mf4(base,value,32); +} + +void +test___riscv_vse8_v_u8mf2(uint8_t* base,vuint8mf2_t value,size_t vl) +{ + __riscv_vse8_v_u8mf2(base,value,32); +} + +void +test___riscv_vse8_v_u8m1(uint8_t* base,vuint8m1_t value,size_t vl) +{ + __riscv_vse8_v_u8m1(base,value,32); +} + +void +test___riscv_vse8_v_u8m2(uint8_t* base,vuint8m2_t value,size_t vl) +{ + __riscv_vse8_v_u8m2(base,value,32); +} + +void +test___riscv_vse8_v_u8m4(uint8_t* base,vuint8m4_t value,size_t vl) +{ + __riscv_vse8_v_u8m4(base,value,32); +} + +void +test___riscv_vse8_v_u8m8(uint8_t* base,vuint8m8_t value,size_t vl) +{ + __riscv_vse8_v_u8m8(base,value,32); +} + +void +test___riscv_vse16_v_i16mf4(int16_t* base,vint16mf4_t value,size_t vl) +{ + __riscv_vse16_v_i16mf4(base,value,32); +} + +void +test___riscv_vse16_v_i16mf2(int16_t* base,vint16mf2_t value,size_t vl) +{ + __riscv_vse16_v_i16mf2(base,value,32); +} + +void +test___riscv_vse16_v_i16m1(int16_t* base,vint16m1_t value,size_t vl) +{ + __riscv_vse16_v_i16m1(base,value,32); +} + +void +test___riscv_vse16_v_i16m2(int16_t* base,vint16m2_t value,size_t vl) +{ + __riscv_vse16_v_i16m2(base,value,32); +} + +void +test___riscv_vse16_v_i16m4(int16_t* base,vint16m4_t value,size_t vl) +{ + __riscv_vse16_v_i16m4(base,value,32); +} + +void +test___riscv_vse16_v_i16m8(int16_t* base,vint16m8_t value,size_t vl) +{ + __riscv_vse16_v_i16m8(base,value,32); +} + +void +test___riscv_vse16_v_u16mf4(uint16_t* base,vuint16mf4_t value,size_t vl) +{ + __riscv_vse16_v_u16mf4(base,value,32); +} + +void +test___riscv_vse16_v_u16mf2(uint16_t* base,vuint16mf2_t value,size_t vl) +{ + __riscv_vse16_v_u16mf2(base,value,32); +} + +void +test___riscv_vse16_v_u16m1(uint16_t* base,vuint16m1_t value,size_t vl) +{ + __riscv_vse16_v_u16m1(base,value,32); +} + +void +test___riscv_vse16_v_u16m2(uint16_t* base,vuint16m2_t value,size_t vl) +{ + __riscv_vse16_v_u16m2(base,value,32); +} + +void +test___riscv_vse16_v_u16m4(uint16_t* base,vuint16m4_t value,size_t vl) +{ + __riscv_vse16_v_u16m4(base,value,32); +} + +void +test___riscv_vse16_v_u16m8(uint16_t* base,vuint16m8_t value,size_t vl) +{ + __riscv_vse16_v_u16m8(base,value,32); +} + +void +test___riscv_vse32_v_i32mf2(int32_t* base,vint32mf2_t value,size_t vl) +{ + __riscv_vse32_v_i32mf2(base,value,32); +} + +void +test___riscv_vse32_v_i32m1(int32_t* base,vint32m1_t value,size_t vl) +{ + __riscv_vse32_v_i32m1(base,value,32); +} + +void +test___riscv_vse32_v_i32m2(int32_t* base,vint32m2_t value,size_t vl) +{ + __riscv_vse32_v_i32m2(base,value,32); +} + +void +test___riscv_vse32_v_i32m4(int32_t* base,vint32m4_t value,size_t vl) +{ + __riscv_vse32_v_i32m4(base,value,32); +} + +void +test___riscv_vse32_v_i32m8(int32_t* base,vint32m8_t value,size_t vl) +{ + __riscv_vse32_v_i32m8(base,value,32); +} + +void +test___riscv_vse32_v_u32mf2(uint32_t* base,vuint32mf2_t value,size_t vl) +{ + __riscv_vse32_v_u32mf2(base,value,32); +} + +void +test___riscv_vse32_v_u32m1(uint32_t* base,vuint32m1_t value,size_t vl) +{ + __riscv_vse32_v_u32m1(base,value,32); +} + +void +test___riscv_vse32_v_u32m2(uint32_t* base,vuint32m2_t value,size_t vl) +{ + __riscv_vse32_v_u32m2(base,value,32); +} + +void +test___riscv_vse32_v_u32m4(uint32_t* base,vuint32m4_t value,size_t vl) +{ + __riscv_vse32_v_u32m4(base,value,32); +} + +void +test___riscv_vse32_v_u32m8(uint32_t* base,vuint32m8_t value,size_t vl) +{ + __riscv_vse32_v_u32m8(base,value,32); +} + +void +test___riscv_vse32_v_f32mf2(float* base,vfloat32mf2_t value,size_t vl) +{ + __riscv_vse32_v_f32mf2(base,value,32); +} + +void +test___riscv_vse32_v_f32m1(float* base,vfloat32m1_t value,size_t vl) +{ + __riscv_vse32_v_f32m1(base,value,32); +} + +void +test___riscv_vse32_v_f32m2(float* base,vfloat32m2_t value,size_t vl) +{ + __riscv_vse32_v_f32m2(base,value,32); +} + +void +test___riscv_vse32_v_f32m4(float* base,vfloat32m4_t value,size_t vl) +{ + __riscv_vse32_v_f32m4(base,value,32); +} + +void +test___riscv_vse32_v_f32m8(float* base,vfloat32m8_t value,size_t vl) +{ + __riscv_vse32_v_f32m8(base,value,32); +} + +void +test___riscv_vse64_v_i64m1(int64_t* base,vint64m1_t value,size_t vl) +{ + __riscv_vse64_v_i64m1(base,value,32); +} + +void +test___riscv_vse64_v_i64m2(int64_t* base,vint64m2_t value,size_t vl) +{ + __riscv_vse64_v_i64m2(base,value,32); +} + +void +test___riscv_vse64_v_i64m4(int64_t* base,vint64m4_t value,size_t vl) +{ + __riscv_vse64_v_i64m4(base,value,32); +} + +void +test___riscv_vse64_v_i64m8(int64_t* base,vint64m8_t value,size_t vl) +{ + __riscv_vse64_v_i64m8(base,value,32); +} + +void +test___riscv_vse64_v_u64m1(uint64_t* base,vuint64m1_t value,size_t vl) +{ + __riscv_vse64_v_u64m1(base,value,32); +} + +void +test___riscv_vse64_v_u64m2(uint64_t* base,vuint64m2_t value,size_t vl) +{ + __riscv_vse64_v_u64m2(base,value,32); +} + +void +test___riscv_vse64_v_u64m4(uint64_t* base,vuint64m4_t value,size_t vl) +{ + __riscv_vse64_v_u64m4(base,value,32); +} + +void +test___riscv_vse64_v_u64m8(uint64_t* base,vuint64m8_t value,size_t vl) +{ + __riscv_vse64_v_u64m8(base,value,32); +} + +void +test___riscv_vse64_v_f64m1(double* base,vfloat64m1_t value,size_t vl) +{ + __riscv_vse64_v_f64m1(base,value,32); +} + +void +test___riscv_vse64_v_f64m2(double* base,vfloat64m2_t value,size_t vl) +{ + __riscv_vse64_v_f64m2(base,value,32); +} + +void +test___riscv_vse64_v_f64m4(double* base,vfloat64m4_t value,size_t vl) +{ + __riscv_vse64_v_f64m4(base,value,32); +} + +void +test___riscv_vse64_v_f64m8(double* base,vfloat64m8_t value,size_t vl) +{ + __riscv_vse64_v_f64m8(base,value,32); +} + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\)} 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-1.c new file mode 100644 index 00000000000..46a79c0c308 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-1.c @@ -0,0 +1,345 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +void +test___riscv_vse8_v_i8mf8_m(vbool64_t mask,int8_t* base,vint8mf8_t value,size_t vl) +{ + __riscv_vse8_v_i8mf8_m(mask,base,value,vl); +} + +void +test___riscv_vse8_v_i8mf4_m(vbool32_t mask,int8_t* base,vint8mf4_t value,size_t vl) +{ + __riscv_vse8_v_i8mf4_m(mask,base,value,vl); +} + +void +test___riscv_vse8_v_i8mf2_m(vbool16_t mask,int8_t* base,vint8mf2_t value,size_t vl) +{ + __riscv_vse8_v_i8mf2_m(mask,base,value,vl); +} + +void +test___riscv_vse8_v_i8m1_m(vbool8_t mask,int8_t* base,vint8m1_t value,size_t vl) +{ + __riscv_vse8_v_i8m1_m(mask,base,value,vl); +} + +void +test___riscv_vse8_v_i8m2_m(vbool4_t mask,int8_t* base,vint8m2_t value,size_t vl) +{ + __riscv_vse8_v_i8m2_m(mask,base,value,vl); +} + +void +test___riscv_vse8_v_i8m4_m(vbool2_t mask,int8_t* base,vint8m4_t value,size_t vl) +{ + __riscv_vse8_v_i8m4_m(mask,base,value,vl); +} + +void +test___riscv_vse8_v_i8m8_m(vbool1_t mask,int8_t* base,vint8m8_t value,size_t vl) +{ + __riscv_vse8_v_i8m8_m(mask,base,value,vl); +} + +void +test___riscv_vse8_v_u8mf8_m(vbool64_t mask,uint8_t* base,vuint8mf8_t value,size_t vl) +{ + __riscv_vse8_v_u8mf8_m(mask,base,value,vl); +} + +void +test___riscv_vse8_v_u8mf4_m(vbool32_t mask,uint8_t* base,vuint8mf4_t value,size_t vl) +{ + __riscv_vse8_v_u8mf4_m(mask,base,value,vl); +} + +void +test___riscv_vse8_v_u8mf2_m(vbool16_t mask,uint8_t* base,vuint8mf2_t value,size_t vl) +{ + __riscv_vse8_v_u8mf2_m(mask,base,value,vl); +} + +void +test___riscv_vse8_v_u8m1_m(vbool8_t mask,uint8_t* base,vuint8m1_t value,size_t vl) +{ + __riscv_vse8_v_u8m1_m(mask,base,value,vl); +} + +void +test___riscv_vse8_v_u8m2_m(vbool4_t mask,uint8_t* base,vuint8m2_t value,size_t vl) +{ + __riscv_vse8_v_u8m2_m(mask,base,value,vl); +} + +void +test___riscv_vse8_v_u8m4_m(vbool2_t mask,uint8_t* base,vuint8m4_t value,size_t vl) +{ + __riscv_vse8_v_u8m4_m(mask,base,value,vl); +} + +void +test___riscv_vse8_v_u8m8_m(vbool1_t mask,uint8_t* base,vuint8m8_t value,size_t vl) +{ + __riscv_vse8_v_u8m8_m(mask,base,value,vl); +} + +void +test___riscv_vse16_v_i16mf4_m(vbool64_t mask,int16_t* base,vint16mf4_t value,size_t vl) +{ + __riscv_vse16_v_i16mf4_m(mask,base,value,vl); +} + +void +test___riscv_vse16_v_i16mf2_m(vbool32_t mask,int16_t* base,vint16mf2_t value,size_t vl) +{ + __riscv_vse16_v_i16mf2_m(mask,base,value,vl); +} + +void +test___riscv_vse16_v_i16m1_m(vbool16_t mask,int16_t* base,vint16m1_t value,size_t vl) +{ + __riscv_vse16_v_i16m1_m(mask,base,value,vl); +} + +void +test___riscv_vse16_v_i16m2_m(vbool8_t mask,int16_t* base,vint16m2_t value,size_t vl) +{ + __riscv_vse16_v_i16m2_m(mask,base,value,vl); +} + +void +test___riscv_vse16_v_i16m4_m(vbool4_t mask,int16_t* base,vint16m4_t value,size_t vl) +{ + __riscv_vse16_v_i16m4_m(mask,base,value,vl); +} + +void +test___riscv_vse16_v_i16m8_m(vbool2_t mask,int16_t* base,vint16m8_t value,size_t vl) +{ + __riscv_vse16_v_i16m8_m(mask,base,value,vl); +} + +void +test___riscv_vse16_v_u16mf4_m(vbool64_t mask,uint16_t* base,vuint16mf4_t value,size_t vl) +{ + __riscv_vse16_v_u16mf4_m(mask,base,value,vl); +} + +void +test___riscv_vse16_v_u16mf2_m(vbool32_t mask,uint16_t* base,vuint16mf2_t value,size_t vl) +{ + __riscv_vse16_v_u16mf2_m(mask,base,value,vl); +} + +void +test___riscv_vse16_v_u16m1_m(vbool16_t mask,uint16_t* base,vuint16m1_t value,size_t vl) +{ + __riscv_vse16_v_u16m1_m(mask,base,value,vl); +} + +void +test___riscv_vse16_v_u16m2_m(vbool8_t mask,uint16_t* base,vuint16m2_t value,size_t vl) +{ + __riscv_vse16_v_u16m2_m(mask,base,value,vl); +} + +void +test___riscv_vse16_v_u16m4_m(vbool4_t mask,uint16_t* base,vuint16m4_t value,size_t vl) +{ + __riscv_vse16_v_u16m4_m(mask,base,value,vl); +} + +void +test___riscv_vse16_v_u16m8_m(vbool2_t mask,uint16_t* base,vuint16m8_t value,size_t vl) +{ + __riscv_vse16_v_u16m8_m(mask,base,value,vl); +} + +void +test___riscv_vse32_v_i32mf2_m(vbool64_t mask,int32_t* base,vint32mf2_t value,size_t vl) +{ + __riscv_vse32_v_i32mf2_m(mask,base,value,vl); +} + +void +test___riscv_vse32_v_i32m1_m(vbool32_t mask,int32_t* base,vint32m1_t value,size_t vl) +{ + __riscv_vse32_v_i32m1_m(mask,base,value,vl); +} + +void +test___riscv_vse32_v_i32m2_m(vbool16_t mask,int32_t* base,vint32m2_t value,size_t vl) +{ + __riscv_vse32_v_i32m2_m(mask,base,value,vl); +} + +void +test___riscv_vse32_v_i32m4_m(vbool8_t mask,int32_t* base,vint32m4_t value,size_t vl) +{ + __riscv_vse32_v_i32m4_m(mask,base,value,vl); +} + +void +test___riscv_vse32_v_i32m8_m(vbool4_t mask,int32_t* base,vint32m8_t value,size_t vl) +{ + __riscv_vse32_v_i32m8_m(mask,base,value,vl); +} + +void +test___riscv_vse32_v_u32mf2_m(vbool64_t mask,uint32_t* base,vuint32mf2_t value,size_t vl) +{ + __riscv_vse32_v_u32mf2_m(mask,base,value,vl); +} + +void +test___riscv_vse32_v_u32m1_m(vbool32_t mask,uint32_t* base,vuint32m1_t value,size_t vl) +{ + __riscv_vse32_v_u32m1_m(mask,base,value,vl); +} + +void +test___riscv_vse32_v_u32m2_m(vbool16_t mask,uint32_t* base,vuint32m2_t value,size_t vl) +{ + __riscv_vse32_v_u32m2_m(mask,base,value,vl); +} + +void +test___riscv_vse32_v_u32m4_m(vbool8_t mask,uint32_t* base,vuint32m4_t value,size_t vl) +{ + __riscv_vse32_v_u32m4_m(mask,base,value,vl); +} + +void +test___riscv_vse32_v_u32m8_m(vbool4_t mask,uint32_t* base,vuint32m8_t value,size_t vl) +{ + __riscv_vse32_v_u32m8_m(mask,base,value,vl); +} + +void +test___riscv_vse32_v_f32mf2_m(vbool64_t mask,float* base,vfloat32mf2_t value,size_t vl) +{ + __riscv_vse32_v_f32mf2_m(mask,base,value,vl); +} + +void +test___riscv_vse32_v_f32m1_m(vbool32_t mask,float* base,vfloat32m1_t value,size_t vl) +{ + __riscv_vse32_v_f32m1_m(mask,base,value,vl); +} + +void +test___riscv_vse32_v_f32m2_m(vbool16_t mask,float* base,vfloat32m2_t value,size_t vl) +{ + __riscv_vse32_v_f32m2_m(mask,base,value,vl); +} + +void +test___riscv_vse32_v_f32m4_m(vbool8_t mask,float* base,vfloat32m4_t value,size_t vl) +{ + __riscv_vse32_v_f32m4_m(mask,base,value,vl); +} + +void +test___riscv_vse32_v_f32m8_m(vbool4_t mask,float* base,vfloat32m8_t value,size_t vl) +{ + __riscv_vse32_v_f32m8_m(mask,base,value,vl); +} + +void +test___riscv_vse64_v_i64m1_m(vbool64_t mask,int64_t* base,vint64m1_t value,size_t vl) +{ + __riscv_vse64_v_i64m1_m(mask,base,value,vl); +} + +void +test___riscv_vse64_v_i64m2_m(vbool32_t mask,int64_t* base,vint64m2_t value,size_t vl) +{ + __riscv_vse64_v_i64m2_m(mask,base,value,vl); +} + +void +test___riscv_vse64_v_i64m4_m(vbool16_t mask,int64_t* base,vint64m4_t value,size_t vl) +{ + __riscv_vse64_v_i64m4_m(mask,base,value,vl); +} + +void +test___riscv_vse64_v_i64m8_m(vbool8_t mask,int64_t* base,vint64m8_t value,size_t vl) +{ + __riscv_vse64_v_i64m8_m(mask,base,value,vl); +} + +void +test___riscv_vse64_v_u64m1_m(vbool64_t mask,uint64_t* base,vuint64m1_t value,size_t vl) +{ + __riscv_vse64_v_u64m1_m(mask,base,value,vl); +} + +void +test___riscv_vse64_v_u64m2_m(vbool32_t mask,uint64_t* base,vuint64m2_t value,size_t vl) +{ + __riscv_vse64_v_u64m2_m(mask,base,value,vl); +} + +void +test___riscv_vse64_v_u64m4_m(vbool16_t mask,uint64_t* base,vuint64m4_t value,size_t vl) +{ + __riscv_vse64_v_u64m4_m(mask,base,value,vl); +} + +void +test___riscv_vse64_v_u64m8_m(vbool8_t mask,uint64_t* base,vuint64m8_t value,size_t vl) +{ + __riscv_vse64_v_u64m8_m(mask,base,value,vl); +} + +void +test___riscv_vse64_v_f64m1_m(vbool64_t mask,double* base,vfloat64m1_t value,size_t vl) +{ + __riscv_vse64_v_f64m1_m(mask,base,value,vl); +} + +void +test___riscv_vse64_v_f64m2_m(vbool32_t mask,double* base,vfloat64m2_t value,size_t vl) +{ + __riscv_vse64_v_f64m2_m(mask,base,value,vl); +} + +void +test___riscv_vse64_v_f64m4_m(vbool16_t mask,double* base,vfloat64m4_t value,size_t vl) +{ + __riscv_vse64_v_f64m4_m(mask,base,value,vl); +} + +void +test___riscv_vse64_v_f64m8_m(vbool8_t mask,double* base,vfloat64m8_t value,size_t vl) +{ + __riscv_vse64_v_f64m8_m(mask,base,value,vl); +} + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-2.c new file mode 100644 index 00000000000..c1fa00e6dd6 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-2.c @@ -0,0 +1,345 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +void +test___riscv_vse8_v_i8mf8_m(vbool64_t mask,int8_t* base,vint8mf8_t value,size_t vl) +{ + __riscv_vse8_v_i8mf8_m(mask,base,value,31); +} + +void +test___riscv_vse8_v_i8mf4_m(vbool32_t mask,int8_t* base,vint8mf4_t value,size_t vl) +{ + __riscv_vse8_v_i8mf4_m(mask,base,value,31); +} + +void +test___riscv_vse8_v_i8mf2_m(vbool16_t mask,int8_t* base,vint8mf2_t value,size_t vl) +{ + __riscv_vse8_v_i8mf2_m(mask,base,value,31); +} + +void +test___riscv_vse8_v_i8m1_m(vbool8_t mask,int8_t* base,vint8m1_t value,size_t vl) +{ + __riscv_vse8_v_i8m1_m(mask,base,value,31); +} + +void +test___riscv_vse8_v_i8m2_m(vbool4_t mask,int8_t* base,vint8m2_t value,size_t vl) +{ + __riscv_vse8_v_i8m2_m(mask,base,value,31); +} + +void +test___riscv_vse8_v_i8m4_m(vbool2_t mask,int8_t* base,vint8m4_t value,size_t vl) +{ + __riscv_vse8_v_i8m4_m(mask,base,value,31); +} + +void +test___riscv_vse8_v_i8m8_m(vbool1_t mask,int8_t* base,vint8m8_t value,size_t vl) +{ + __riscv_vse8_v_i8m8_m(mask,base,value,31); +} + +void +test___riscv_vse8_v_u8mf8_m(vbool64_t mask,uint8_t* base,vuint8mf8_t value,size_t vl) +{ + __riscv_vse8_v_u8mf8_m(mask,base,value,31); +} + +void +test___riscv_vse8_v_u8mf4_m(vbool32_t mask,uint8_t* base,vuint8mf4_t value,size_t vl) +{ + __riscv_vse8_v_u8mf4_m(mask,base,value,31); +} + +void +test___riscv_vse8_v_u8mf2_m(vbool16_t mask,uint8_t* base,vuint8mf2_t value,size_t vl) +{ + __riscv_vse8_v_u8mf2_m(mask,base,value,31); +} + +void +test___riscv_vse8_v_u8m1_m(vbool8_t mask,uint8_t* base,vuint8m1_t value,size_t vl) +{ + __riscv_vse8_v_u8m1_m(mask,base,value,31); +} + +void +test___riscv_vse8_v_u8m2_m(vbool4_t mask,uint8_t* base,vuint8m2_t value,size_t vl) +{ + __riscv_vse8_v_u8m2_m(mask,base,value,31); +} + +void +test___riscv_vse8_v_u8m4_m(vbool2_t mask,uint8_t* base,vuint8m4_t value,size_t vl) +{ + __riscv_vse8_v_u8m4_m(mask,base,value,31); +} + +void +test___riscv_vse8_v_u8m8_m(vbool1_t mask,uint8_t* base,vuint8m8_t value,size_t vl) +{ + __riscv_vse8_v_u8m8_m(mask,base,value,31); +} + +void +test___riscv_vse16_v_i16mf4_m(vbool64_t mask,int16_t* base,vint16mf4_t value,size_t vl) +{ + __riscv_vse16_v_i16mf4_m(mask,base,value,31); +} + +void +test___riscv_vse16_v_i16mf2_m(vbool32_t mask,int16_t* base,vint16mf2_t value,size_t vl) +{ + __riscv_vse16_v_i16mf2_m(mask,base,value,31); +} + +void +test___riscv_vse16_v_i16m1_m(vbool16_t mask,int16_t* base,vint16m1_t value,size_t vl) +{ + __riscv_vse16_v_i16m1_m(mask,base,value,31); +} + +void +test___riscv_vse16_v_i16m2_m(vbool8_t mask,int16_t* base,vint16m2_t value,size_t vl) +{ + __riscv_vse16_v_i16m2_m(mask,base,value,31); +} + +void +test___riscv_vse16_v_i16m4_m(vbool4_t mask,int16_t* base,vint16m4_t value,size_t vl) +{ + __riscv_vse16_v_i16m4_m(mask,base,value,31); +} + +void +test___riscv_vse16_v_i16m8_m(vbool2_t mask,int16_t* base,vint16m8_t value,size_t vl) +{ + __riscv_vse16_v_i16m8_m(mask,base,value,31); +} + +void +test___riscv_vse16_v_u16mf4_m(vbool64_t mask,uint16_t* base,vuint16mf4_t value,size_t vl) +{ + __riscv_vse16_v_u16mf4_m(mask,base,value,31); +} + +void +test___riscv_vse16_v_u16mf2_m(vbool32_t mask,uint16_t* base,vuint16mf2_t value,size_t vl) +{ + __riscv_vse16_v_u16mf2_m(mask,base,value,31); +} + +void +test___riscv_vse16_v_u16m1_m(vbool16_t mask,uint16_t* base,vuint16m1_t value,size_t vl) +{ + __riscv_vse16_v_u16m1_m(mask,base,value,31); +} + +void +test___riscv_vse16_v_u16m2_m(vbool8_t mask,uint16_t* base,vuint16m2_t value,size_t vl) +{ + __riscv_vse16_v_u16m2_m(mask,base,value,31); +} + +void +test___riscv_vse16_v_u16m4_m(vbool4_t mask,uint16_t* base,vuint16m4_t value,size_t vl) +{ + __riscv_vse16_v_u16m4_m(mask,base,value,31); +} + +void +test___riscv_vse16_v_u16m8_m(vbool2_t mask,uint16_t* base,vuint16m8_t value,size_t vl) +{ + __riscv_vse16_v_u16m8_m(mask,base,value,31); +} + +void +test___riscv_vse32_v_i32mf2_m(vbool64_t mask,int32_t* base,vint32mf2_t value,size_t vl) +{ + __riscv_vse32_v_i32mf2_m(mask,base,value,31); +} + +void +test___riscv_vse32_v_i32m1_m(vbool32_t mask,int32_t* base,vint32m1_t value,size_t vl) +{ + __riscv_vse32_v_i32m1_m(mask,base,value,31); +} + +void +test___riscv_vse32_v_i32m2_m(vbool16_t mask,int32_t* base,vint32m2_t value,size_t vl) +{ + __riscv_vse32_v_i32m2_m(mask,base,value,31); +} + +void +test___riscv_vse32_v_i32m4_m(vbool8_t mask,int32_t* base,vint32m4_t value,size_t vl) +{ + __riscv_vse32_v_i32m4_m(mask,base,value,31); +} + +void +test___riscv_vse32_v_i32m8_m(vbool4_t mask,int32_t* base,vint32m8_t value,size_t vl) +{ + __riscv_vse32_v_i32m8_m(mask,base,value,31); +} + +void +test___riscv_vse32_v_u32mf2_m(vbool64_t mask,uint32_t* base,vuint32mf2_t value,size_t vl) +{ + __riscv_vse32_v_u32mf2_m(mask,base,value,31); +} + +void +test___riscv_vse32_v_u32m1_m(vbool32_t mask,uint32_t* base,vuint32m1_t value,size_t vl) +{ + __riscv_vse32_v_u32m1_m(mask,base,value,31); +} + +void +test___riscv_vse32_v_u32m2_m(vbool16_t mask,uint32_t* base,vuint32m2_t value,size_t vl) +{ + __riscv_vse32_v_u32m2_m(mask,base,value,31); +} + +void +test___riscv_vse32_v_u32m4_m(vbool8_t mask,uint32_t* base,vuint32m4_t value,size_t vl) +{ + __riscv_vse32_v_u32m4_m(mask,base,value,31); +} + +void +test___riscv_vse32_v_u32m8_m(vbool4_t mask,uint32_t* base,vuint32m8_t value,size_t vl) +{ + __riscv_vse32_v_u32m8_m(mask,base,value,31); +} + +void +test___riscv_vse32_v_f32mf2_m(vbool64_t mask,float* base,vfloat32mf2_t value,size_t vl) +{ + __riscv_vse32_v_f32mf2_m(mask,base,value,31); +} + +void +test___riscv_vse32_v_f32m1_m(vbool32_t mask,float* base,vfloat32m1_t value,size_t vl) +{ + __riscv_vse32_v_f32m1_m(mask,base,value,31); +} + +void +test___riscv_vse32_v_f32m2_m(vbool16_t mask,float* base,vfloat32m2_t value,size_t vl) +{ + __riscv_vse32_v_f32m2_m(mask,base,value,31); +} + +void +test___riscv_vse32_v_f32m4_m(vbool8_t mask,float* base,vfloat32m4_t value,size_t vl) +{ + __riscv_vse32_v_f32m4_m(mask,base,value,31); +} + +void +test___riscv_vse32_v_f32m8_m(vbool4_t mask,float* base,vfloat32m8_t value,size_t vl) +{ + __riscv_vse32_v_f32m8_m(mask,base,value,31); +} + +void +test___riscv_vse64_v_i64m1_m(vbool64_t mask,int64_t* base,vint64m1_t value,size_t vl) +{ + __riscv_vse64_v_i64m1_m(mask,base,value,31); +} + +void +test___riscv_vse64_v_i64m2_m(vbool32_t mask,int64_t* base,vint64m2_t value,size_t vl) +{ + __riscv_vse64_v_i64m2_m(mask,base,value,31); +} + +void +test___riscv_vse64_v_i64m4_m(vbool16_t mask,int64_t* base,vint64m4_t value,size_t vl) +{ + __riscv_vse64_v_i64m4_m(mask,base,value,31); +} + +void +test___riscv_vse64_v_i64m8_m(vbool8_t mask,int64_t* base,vint64m8_t value,size_t vl) +{ + __riscv_vse64_v_i64m8_m(mask,base,value,31); +} + +void +test___riscv_vse64_v_u64m1_m(vbool64_t mask,uint64_t* base,vuint64m1_t value,size_t vl) +{ + __riscv_vse64_v_u64m1_m(mask,base,value,31); +} + +void +test___riscv_vse64_v_u64m2_m(vbool32_t mask,uint64_t* base,vuint64m2_t value,size_t vl) +{ + __riscv_vse64_v_u64m2_m(mask,base,value,31); +} + +void +test___riscv_vse64_v_u64m4_m(vbool16_t mask,uint64_t* base,vuint64m4_t value,size_t vl) +{ + __riscv_vse64_v_u64m4_m(mask,base,value,31); +} + +void +test___riscv_vse64_v_u64m8_m(vbool8_t mask,uint64_t* base,vuint64m8_t value,size_t vl) +{ + __riscv_vse64_v_u64m8_m(mask,base,value,31); +} + +void +test___riscv_vse64_v_f64m1_m(vbool64_t mask,double* base,vfloat64m1_t value,size_t vl) +{ + __riscv_vse64_v_f64m1_m(mask,base,value,31); +} + +void +test___riscv_vse64_v_f64m2_m(vbool32_t mask,double* base,vfloat64m2_t value,size_t vl) +{ + __riscv_vse64_v_f64m2_m(mask,base,value,31); +} + +void +test___riscv_vse64_v_f64m4_m(vbool16_t mask,double* base,vfloat64m4_t value,size_t vl) +{ + __riscv_vse64_v_f64m4_m(mask,base,value,31); +} + +void +test___riscv_vse64_v_f64m8_m(vbool8_t mask,double* base,vfloat64m8_t value,size_t vl) +{ + __riscv_vse64_v_f64m8_m(mask,base,value,31); +} + +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*31,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-3.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-3.c new file mode 100644 index 00000000000..82a3da759b5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-3.c @@ -0,0 +1,345 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ + +#include "riscv_vector.h" + +void +test___riscv_vse8_v_i8mf8_m(vbool64_t mask,int8_t* base,vint8mf8_t value,size_t vl) +{ + __riscv_vse8_v_i8mf8_m(mask,base,value,32); +} + +void +test___riscv_vse8_v_i8mf4_m(vbool32_t mask,int8_t* base,vint8mf4_t value,size_t vl) +{ + __riscv_vse8_v_i8mf4_m(mask,base,value,32); +} + +void +test___riscv_vse8_v_i8mf2_m(vbool16_t mask,int8_t* base,vint8mf2_t value,size_t vl) +{ + __riscv_vse8_v_i8mf2_m(mask,base,value,32); +} + +void +test___riscv_vse8_v_i8m1_m(vbool8_t mask,int8_t* base,vint8m1_t value,size_t vl) +{ + __riscv_vse8_v_i8m1_m(mask,base,value,32); +} + +void +test___riscv_vse8_v_i8m2_m(vbool4_t mask,int8_t* base,vint8m2_t value,size_t vl) +{ + __riscv_vse8_v_i8m2_m(mask,base,value,32); +} + +void +test___riscv_vse8_v_i8m4_m(vbool2_t mask,int8_t* base,vint8m4_t value,size_t vl) +{ + __riscv_vse8_v_i8m4_m(mask,base,value,32); +} + +void +test___riscv_vse8_v_i8m8_m(vbool1_t mask,int8_t* base,vint8m8_t value,size_t vl) +{ + __riscv_vse8_v_i8m8_m(mask,base,value,32); +} + +void +test___riscv_vse8_v_u8mf8_m(vbool64_t mask,uint8_t* base,vuint8mf8_t value,size_t vl) +{ + __riscv_vse8_v_u8mf8_m(mask,base,value,32); +} + +void +test___riscv_vse8_v_u8mf4_m(vbool32_t mask,uint8_t* base,vuint8mf4_t value,size_t vl) +{ + __riscv_vse8_v_u8mf4_m(mask,base,value,32); +} + +void +test___riscv_vse8_v_u8mf2_m(vbool16_t mask,uint8_t* base,vuint8mf2_t value,size_t vl) +{ + __riscv_vse8_v_u8mf2_m(mask,base,value,32); +} + +void +test___riscv_vse8_v_u8m1_m(vbool8_t mask,uint8_t* base,vuint8m1_t value,size_t vl) +{ + __riscv_vse8_v_u8m1_m(mask,base,value,32); +} + +void +test___riscv_vse8_v_u8m2_m(vbool4_t mask,uint8_t* base,vuint8m2_t value,size_t vl) +{ + __riscv_vse8_v_u8m2_m(mask,base,value,32); +} + +void +test___riscv_vse8_v_u8m4_m(vbool2_t mask,uint8_t* base,vuint8m4_t value,size_t vl) +{ + __riscv_vse8_v_u8m4_m(mask,base,value,32); +} + +void +test___riscv_vse8_v_u8m8_m(vbool1_t mask,uint8_t* base,vuint8m8_t value,size_t vl) +{ + __riscv_vse8_v_u8m8_m(mask,base,value,32); +} + +void +test___riscv_vse16_v_i16mf4_m(vbool64_t mask,int16_t* base,vint16mf4_t value,size_t vl) +{ + __riscv_vse16_v_i16mf4_m(mask,base,value,32); +} + +void +test___riscv_vse16_v_i16mf2_m(vbool32_t mask,int16_t* base,vint16mf2_t value,size_t vl) +{ + __riscv_vse16_v_i16mf2_m(mask,base,value,32); +} + +void +test___riscv_vse16_v_i16m1_m(vbool16_t mask,int16_t* base,vint16m1_t value,size_t vl) +{ + __riscv_vse16_v_i16m1_m(mask,base,value,32); +} + +void +test___riscv_vse16_v_i16m2_m(vbool8_t mask,int16_t* base,vint16m2_t value,size_t vl) +{ + __riscv_vse16_v_i16m2_m(mask,base,value,32); +} + +void +test___riscv_vse16_v_i16m4_m(vbool4_t mask,int16_t* base,vint16m4_t value,size_t vl) +{ + __riscv_vse16_v_i16m4_m(mask,base,value,32); +} + +void +test___riscv_vse16_v_i16m8_m(vbool2_t mask,int16_t* base,vint16m8_t value,size_t vl) +{ + __riscv_vse16_v_i16m8_m(mask,base,value,32); +} + +void +test___riscv_vse16_v_u16mf4_m(vbool64_t mask,uint16_t* base,vuint16mf4_t value,size_t vl) +{ + __riscv_vse16_v_u16mf4_m(mask,base,value,32); +} + +void +test___riscv_vse16_v_u16mf2_m(vbool32_t mask,uint16_t* base,vuint16mf2_t value,size_t vl) +{ + __riscv_vse16_v_u16mf2_m(mask,base,value,32); +} + +void +test___riscv_vse16_v_u16m1_m(vbool16_t mask,uint16_t* base,vuint16m1_t value,size_t vl) +{ + __riscv_vse16_v_u16m1_m(mask,base,value,32); +} + +void +test___riscv_vse16_v_u16m2_m(vbool8_t mask,uint16_t* base,vuint16m2_t value,size_t vl) +{ + __riscv_vse16_v_u16m2_m(mask,base,value,32); +} + +void +test___riscv_vse16_v_u16m4_m(vbool4_t mask,uint16_t* base,vuint16m4_t value,size_t vl) +{ + __riscv_vse16_v_u16m4_m(mask,base,value,32); +} + +void +test___riscv_vse16_v_u16m8_m(vbool2_t mask,uint16_t* base,vuint16m8_t value,size_t vl) +{ + __riscv_vse16_v_u16m8_m(mask,base,value,32); +} + +void +test___riscv_vse32_v_i32mf2_m(vbool64_t mask,int32_t* base,vint32mf2_t value,size_t vl) +{ + __riscv_vse32_v_i32mf2_m(mask,base,value,32); +} + +void +test___riscv_vse32_v_i32m1_m(vbool32_t mask,int32_t* base,vint32m1_t value,size_t vl) +{ + __riscv_vse32_v_i32m1_m(mask,base,value,32); +} + +void +test___riscv_vse32_v_i32m2_m(vbool16_t mask,int32_t* base,vint32m2_t value,size_t vl) +{ + __riscv_vse32_v_i32m2_m(mask,base,value,32); +} + +void +test___riscv_vse32_v_i32m4_m(vbool8_t mask,int32_t* base,vint32m4_t value,size_t vl) +{ + __riscv_vse32_v_i32m4_m(mask,base,value,32); +} + +void +test___riscv_vse32_v_i32m8_m(vbool4_t mask,int32_t* base,vint32m8_t value,size_t vl) +{ + __riscv_vse32_v_i32m8_m(mask,base,value,32); +} + +void +test___riscv_vse32_v_u32mf2_m(vbool64_t mask,uint32_t* base,vuint32mf2_t value,size_t vl) +{ + __riscv_vse32_v_u32mf2_m(mask,base,value,32); +} + +void +test___riscv_vse32_v_u32m1_m(vbool32_t mask,uint32_t* base,vuint32m1_t value,size_t vl) +{ + __riscv_vse32_v_u32m1_m(mask,base,value,32); +} + +void +test___riscv_vse32_v_u32m2_m(vbool16_t mask,uint32_t* base,vuint32m2_t value,size_t vl) +{ + __riscv_vse32_v_u32m2_m(mask,base,value,32); +} + +void +test___riscv_vse32_v_u32m4_m(vbool8_t mask,uint32_t* base,vuint32m4_t value,size_t vl) +{ + __riscv_vse32_v_u32m4_m(mask,base,value,32); +} + +void +test___riscv_vse32_v_u32m8_m(vbool4_t mask,uint32_t* base,vuint32m8_t value,size_t vl) +{ + __riscv_vse32_v_u32m8_m(mask,base,value,32); +} + +void +test___riscv_vse32_v_f32mf2_m(vbool64_t mask,float* base,vfloat32mf2_t value,size_t vl) +{ + __riscv_vse32_v_f32mf2_m(mask,base,value,32); +} + +void +test___riscv_vse32_v_f32m1_m(vbool32_t mask,float* base,vfloat32m1_t value,size_t vl) +{ + __riscv_vse32_v_f32m1_m(mask,base,value,32); +} + +void +test___riscv_vse32_v_f32m2_m(vbool16_t mask,float* base,vfloat32m2_t value,size_t vl) +{ + __riscv_vse32_v_f32m2_m(mask,base,value,32); +} + +void +test___riscv_vse32_v_f32m4_m(vbool8_t mask,float* base,vfloat32m4_t value,size_t vl) +{ + __riscv_vse32_v_f32m4_m(mask,base,value,32); +} + +void +test___riscv_vse32_v_f32m8_m(vbool4_t mask,float* base,vfloat32m8_t value,size_t vl) +{ + __riscv_vse32_v_f32m8_m(mask,base,value,32); +} + +void +test___riscv_vse64_v_i64m1_m(vbool64_t mask,int64_t* base,vint64m1_t value,size_t vl) +{ + __riscv_vse64_v_i64m1_m(mask,base,value,32); +} + +void +test___riscv_vse64_v_i64m2_m(vbool32_t mask,int64_t* base,vint64m2_t value,size_t vl) +{ + __riscv_vse64_v_i64m2_m(mask,base,value,32); +} + +void +test___riscv_vse64_v_i64m4_m(vbool16_t mask,int64_t* base,vint64m4_t value,size_t vl) +{ + __riscv_vse64_v_i64m4_m(mask,base,value,32); +} + +void +test___riscv_vse64_v_i64m8_m(vbool8_t mask,int64_t* base,vint64m8_t value,size_t vl) +{ + __riscv_vse64_v_i64m8_m(mask,base,value,32); +} + +void +test___riscv_vse64_v_u64m1_m(vbool64_t mask,uint64_t* base,vuint64m1_t value,size_t vl) +{ + __riscv_vse64_v_u64m1_m(mask,base,value,32); +} + +void +test___riscv_vse64_v_u64m2_m(vbool32_t mask,uint64_t* base,vuint64m2_t value,size_t vl) +{ + __riscv_vse64_v_u64m2_m(mask,base,value,32); +} + +void +test___riscv_vse64_v_u64m4_m(vbool16_t mask,uint64_t* base,vuint64m4_t value,size_t vl) +{ + __riscv_vse64_v_u64m4_m(mask,base,value,32); +} + +void +test___riscv_vse64_v_u64m8_m(vbool8_t mask,uint64_t* base,vuint64m8_t value,size_t vl) +{ + __riscv_vse64_v_u64m8_m(mask,base,value,32); +} + +void +test___riscv_vse64_v_f64m1_m(vbool64_t mask,double* base,vfloat64m1_t value,size_t vl) +{ + __riscv_vse64_v_f64m1_m(mask,base,value,32); +} + +void +test___riscv_vse64_v_f64m2_m(vbool32_t mask,double* base,vfloat64m2_t value,size_t vl) +{ + __riscv_vse64_v_f64m2_m(mask,base,value,32); +} + +void +test___riscv_vse64_v_f64m4_m(vbool16_t mask,double* base,vfloat64m4_t value,size_t vl) +{ + __riscv_vse64_v_f64m4_m(mask,base,value,32); +} + +void +test___riscv_vse64_v_f64m8_m(vbool8_t mask,double* base,vfloat64m8_t value,size_t vl) +{ + __riscv_vse64_v_f64m8_m(mask,base,value,32); +} + +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m1,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m2,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m4,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*m8,\s*t[au],\s*m[au]\s+vse8\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m1,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m2,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m4,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e16,\s*m8,\s*t[au],\s*m[au]\s+vse16\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 2 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m1,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m2,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m4,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*m8,\s*t[au],\s*m[au]\s+vse32\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m1,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m2,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m4,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e64,\s*m8,\s*t[au],\s*m[au]\s+vse64\.v\s+v[0-9]+,\s*0\([a-x0-9]+\),\s*v0.t} 3 } } */