From patchwork Wed Nov 9 07:21:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xi Ruoyao X-Patchwork-Id: 1701644 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=nsyhpBnU; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4N6bzR4Mtyz23lT for ; Wed, 9 Nov 2022 18:23:15 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 803443889E00 for ; Wed, 9 Nov 2022 07:23:13 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 803443889E00 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1667978593; bh=gmMmUX7GGDukYfwS7/exUxtK7KwqYw+fEcg1W5vRwDs=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=nsyhpBnUKBxzsKKYqW80j/hpWdD89oZDwlMQvZfJMghNFwT729j5PLIEvkp6uNZNY WCqnm4SXT7ZypDzo+Reng+c32Ig0v9u+FkQ7Q1PDrFQJPqaZ1ka+vtFXPG//DBab0o wJLm/jIpwrzAjpXT2B41bUgSt742JrQEIiDrUkt0= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from xry111.site (xry111.site [89.208.246.23]) by sourceware.org (Postfix) with ESMTPS id F123B3858002 for ; Wed, 9 Nov 2022 07:22:48 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org F123B3858002 Received: from xry111-x57s1.. (unknown [IPv6:240e:358:113a:1300:dc73:854d:832e:2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (Client did not present a certificate) (Authenticated sender: xry111@xry111.site) by xry111.site (Postfix) with ESMTPSA id 01D3265DD0; Wed, 9 Nov 2022 02:22:44 -0500 (EST) To: gcc-patches@gcc.gnu.org Cc: Lulu Cheng , Wang Xuerui , Chenghua Xu , Xiaolin Tang , Xi Ruoyao Subject: [PATCH 4/4] LoongArch: Add flogb.{s, d} instructions and expand logb{sf, df}2 Date: Wed, 9 Nov 2022 15:21:47 +0800 Message-Id: <20221109072147.789090-5-xry111@xry111.site> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221109072147.789090-1-xry111@xry111.site> References: <20221109072147.789090-1-xry111@xry111.site> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FROM_SUSPICIOUS_NTLD, GIT_PATCH_0, KAM_NUMSUBJECT, KAM_SHORT, LIKELY_SPAM_FROM, PDS_OTHER_BAD_TLD, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Xi Ruoyao via Gcc-patches From: Xi Ruoyao Reply-To: Xi Ruoyao Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" On LoongArch, flogb instructions extract the exponent of a non-negative floating point value, but produces NaN for negative values. So we need to add a fabs instruction when we expand logb. gcc/ChangeLog: * config/loongarch/loongarch.md (UNSPEC_FLOGB): New unspec. (type): Add flogb. (logb_non_negative2): New instruction template. (logb2): New define_expand. gcc/testsuite/ChangeLog: * gcc.target/loongarch/flogb.c: New test. --- gcc/config/loongarch/loongarch.md | 35 ++++++++++++++++++++-- gcc/testsuite/gcc.target/loongarch/flogb.c | 18 +++++++++++ 2 files changed, 51 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/loongarch/flogb.c diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index 9070ac4e2f8..072c3163b75 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -42,6 +42,7 @@ (define_c_enum "unspec" [ UNSPEC_FTINTRM UNSPEC_FTINTRP UNSPEC_FSCALEB + UNSPEC_FLOGB ;; Override return address for exception handling. UNSPEC_EH_RETURN @@ -217,6 +218,7 @@ (define_attr "qword_mode" "no,yes" ;; fdiv floating point divide ;; frdiv floating point reciprocal divide ;; fabs floating point absolute value +;; flogb floating point exponent extract ;; fneg floating point negation ;; fcmp floating point compare ;; fcopysign floating point copysign @@ -233,8 +235,8 @@ (define_attr "type" "unknown,branch,jump,call,load,fpload,fpidxload,store,fpstore,fpidxstore, prefetch,prefetchx,condmove,mgtf,mftg,const,arith,logical, shift,slt,signext,clz,trap,imul,idiv,move, - fmove,fadd,fmul,fmadd,fdiv,frdiv,fabs,fneg,fcmp,fcopysign,fcvt,fscaleb, - fsqrt,frsqrt,accext,accmod,multi,atomic,syncloop,nop,ghost" + fmove,fadd,fmul,fmadd,fdiv,frdiv,fabs,flogb,fneg,fcmp,fcopysign,fcvt, + fscaleb,fsqrt,frsqrt,accext,accmod,multi,atomic,syncloop,nop,ghost" (cond [(eq_attr "jirl" "!unset") (const_string "call") (eq_attr "got" "load") (const_string "load") @@ -1036,6 +1038,35 @@ (define_insn "ldexp3" (set_attr "mode" "")]) ;; +;; .................... +;; +;; FLOATING POINT EXPONENT EXTRACT +;; +;; .................... + +(define_insn "logb_non_negative2" + [(set (match_operand:ANYF 0 "register_operand" "=f") + (unspec:ANYF [(match_operand:ANYF 1 "register_operand" "f")] + UNSPEC_FLOGB))] + "TARGET_HARD_FLOAT" + "flogb.\t%0,%1" + [(set_attr "type" "flogb") + (set_attr "mode" "")]) + +(define_expand "logb2" + [(set (match_operand:ANYF 0 "register_operand") + (unspec:ANYF [(abs:ANYF (match_operand:ANYF 1 "register_operand"))] + UNSPEC_FLOGB))] + "TARGET_HARD_FLOAT" +{ + rtx tmp = gen_reg_rtx (mode); + + emit_insn (gen_abs2 (tmp, operands[1])); + emit_insn (gen_logb_non_negative2 (operands[0], tmp)); + DONE; +}) + +;; ;; ................... ;; ;; Count leading zeroes. diff --git a/gcc/testsuite/gcc.target/loongarch/flogb.c b/gcc/testsuite/gcc.target/loongarch/flogb.c new file mode 100644 index 00000000000..1daefe54e13 --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/flogb.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mdouble-float -fno-math-errno" } */ +/* { dg-final { scan-assembler "fabs\\.s" } } */ +/* { dg-final { scan-assembler "fabs\\.d" } } */ +/* { dg-final { scan-assembler "flogb\\.s" } } */ +/* { dg-final { scan-assembler "flogb\\.d" } } */ + +double +my_logb (double a) +{ + return __builtin_logb (a); +} + +float +my_logbf (float a) +{ + return __builtin_logbf (a); +}