From patchwork Tue Jun 7 08:03:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: yulong X-Patchwork-Id: 1639838 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LHNDG3z2Rz9sFs for ; Tue, 7 Jun 2022 18:04:13 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3B2CC382C15F for ; Tue, 7 Jun 2022 08:04:11 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from cstnet.cn (smtp21.cstnet.cn [159.226.251.21]) by sourceware.org (Postfix) with ESMTP id C5061382CCAF for ; Tue, 7 Jun 2022 08:03:54 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org C5061382CCAF Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=iscas.ac.cn Received: from localhost.localdomain (unknown [47.88.16.30]) by APP-01 (Coremail) with SMTP id qwCowADHlFlhBp9i4PMgAA--.5580S2; Tue, 07 Jun 2022 16:03:49 +0800 (CST) From: shiyulong@iscas.ac.cn To: gcc-patches@gcc.gnu.org Subject: [PATCH V2] RISC-V:Fix a bug that is the CMO builtins are missing parameter Date: Tue, 7 Jun 2022 16:03:29 +0800 Message-Id: <20220607080329.12581-1-shiyulong@iscas.ac.cn> X-Mailer: git-send-email 2.17.1 X-CM-TRANSID: qwCowADHlFlhBp9i4PMgAA--.5580S2 X-Coremail-Antispam: 1UD129KBjvJXoW3XF4rAFyDtrWrKw1xWFW7urg_yoWfJrWkp3 y7Ar4jy34rZ3Z7Jr4vqFy5J39Yy347W3y5W39xu3y0qFsrA39rtFnrKayxJrWDAF15Xw1I 9F4UuFWfua1jqrJanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUvE14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4U JVWxJr1l84ACjcxK6I8E87Iv67AKxVWxJr0_GcWl84ACjcxK6I8E87Iv6xkF7I0E14v26r xl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj 6xIIjxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr 0_Gr1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7M4IIrI8v6xkF7I0E 8cxan2IY04v7M4kE6xkIj40Ew7xC0wCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbV WUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF 67kF1VAFwI0_Jw0_GFylIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42 IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF04k26cxKx2IYs7xG6rW3Jr0E3s1l IxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x0267AKxVWUJVW8JbIYCTnIWI evJa73UjIFyTuYvjfUOxhLUUUUU X-Originating-IP: [47.88.16.30] X-CM-SenderInfo: 5vkl53porqwq5lvft2wodfhubq/ X-Spam-Status: No, score=-12.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: andrew@sifive.com, yulong , kito.cheng@gmail.com, jiawei@iscas.ac.cn, wuwei2016@iscas.ac.cn, shihua@iscas.ac.cn Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" From: yulong We changed builtins format about zicbom and zicboz subextensions and added test cases. diff with the previous version: 1.We deleted the RLT mode's second input operand. 2.We modified the type of builtins from RISCV_BUILTIN_DIRECT to RISCV_BUILTIN_DIRECT_NO_TARGET. 3.We modified the test cases and added more parameter tests. Thanks, Simon and Kito. gcc/ChangeLog: * config/riscv/riscv-cmo.def (RISCV_BUILTIN): changed BUILTIN_TYPE and FUNCTION_TYPE * config/riscv/riscv-ftypes.def (0): changed "DEF_RISCV_FTYPE (0, (SI/DI))" to "DEF_RISCV_FTYPE (1, (VOID, SI/DI))" (1): gcc/testsuite/ChangeLog: * gcc.target/riscv/cmo-zicbom-1.c: added parameter and modified the fun's type * gcc.target/riscv/cmo-zicbom-2.c: added parameter and modified the fun's type * gcc.target/riscv/cmo-zicboz-1.c: added parameter and modified the fun's type * gcc.target/riscv/cmo-zicboz-2.c: added parameter and modified the fun's type --- gcc/config/riscv/riscv-cmo.def | 16 ++++++------ gcc/config/riscv/riscv-ftypes.def | 4 +-- gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c | 25 ++++++++++++------- gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c | 25 ++++++++++++------- gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c | 9 ++++--- gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c | 9 ++++--- 6 files changed, 54 insertions(+), 34 deletions(-) diff --git a/gcc/config/riscv/riscv-cmo.def b/gcc/config/riscv/riscv-cmo.def index b30ecf96ec1..7b3da7c24ef 100644 --- a/gcc/config/riscv/riscv-cmo.def +++ b/gcc/config/riscv/riscv-cmo.def @@ -1,16 +1,16 @@ // zicbom -RISCV_BUILTIN (clean_si, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, clean32), -RISCV_BUILTIN (clean_di, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, clean64), +RISCV_BUILTIN (clean_si, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_SI, clean32), +RISCV_BUILTIN (clean_di, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_DI, clean64), -RISCV_BUILTIN (flush_si, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, flush32), -RISCV_BUILTIN (flush_di, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, flush64), +RISCV_BUILTIN (flush_si, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_SI, flush32), +RISCV_BUILTIN (flush_di, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_DI, flush64), -RISCV_BUILTIN (inval_si, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, inval32), -RISCV_BUILTIN (inval_di, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, inval64), +RISCV_BUILTIN (inval_si, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_SI, inval32), +RISCV_BUILTIN (inval_di, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_DI, inval64), // zicboz -RISCV_BUILTIN (zero_si, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, zero32), -RISCV_BUILTIN (zero_di, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, zero64), +RISCV_BUILTIN (zero_si, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_SI, zero32), +RISCV_BUILTIN (zero_di, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_DI, zero64), // zicbop RISCV_BUILTIN (prefetchi_si, "zicbop_cbo_prefetchi", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, prefetchi32), diff --git a/gcc/config/riscv/riscv-ftypes.def b/gcc/config/riscv/riscv-ftypes.def index 62421292ce7..77ac6ea3f66 100644 --- a/gcc/config/riscv/riscv-ftypes.def +++ b/gcc/config/riscv/riscv-ftypes.def @@ -28,7 +28,7 @@ along with GCC; see the file COPYING3. If not see DEF_RISCV_FTYPE (0, (USI)) DEF_RISCV_FTYPE (1, (VOID, USI)) -DEF_RISCV_FTYPE (0, (SI)) -DEF_RISCV_FTYPE (0, (DI)) +DEF_RISCV_FTYPE (1, (VOID, SI)) +DEF_RISCV_FTYPE (1, (VOID, DI)) DEF_RISCV_FTYPE (1, (SI, SI)) DEF_RISCV_FTYPE (1, (DI, DI)) diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c index e2ba2183511..2bf5b77380e 100644 --- a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c +++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c @@ -1,21 +1,28 @@ /* { dg-do compile } */ /* { dg-options "-march=rv64gc_zicbom -mabi=lp64" } */ +int var; -int foo1() +void foo1() { - return __builtin_riscv_zicbom_cbo_clean(); + __builtin_riscv_zicbom_cbo_clean(0); + __builtin_riscv_zicbom_cbo_clean(var); + __builtin_riscv_zicbom_cbo_clean(0x111); } -int foo2() +void foo2() { - return __builtin_riscv_zicbom_cbo_flush(); + __builtin_riscv_zicbom_cbo_flush(0); + __builtin_riscv_zicbom_cbo_flush(var); + __builtin_riscv_zicbom_cbo_flush(0x111); } -int foo3() +void foo3() { - return __builtin_riscv_zicbom_cbo_inval(); + __builtin_riscv_zicbom_cbo_inval(0); + __builtin_riscv_zicbom_cbo_inval(var); + __builtin_riscv_zicbom_cbo_inval(0x111); } -/* { dg-final { scan-assembler-times "cbo.clean" 1 } } */ -/* { dg-final { scan-assembler-times "cbo.flush" 1 } } */ -/* { dg-final { scan-assembler-times "cbo.inval" 1 } } */ +/* { dg-final { scan-assembler-times "cbo.clean" 3 } } */ +/* { dg-final { scan-assembler-times "cbo.flush" 3 } } */ +/* { dg-final { scan-assembler-times "cbo.inval" 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c index a605e8b1bdc..572a6f05921 100644 --- a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c +++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c @@ -1,21 +1,28 @@ /* { dg-do compile } */ /* { dg-options "-march=rv32gc_zicbom -mabi=ilp32" } */ +int var; -int foo1() +void foo1() { - return __builtin_riscv_zicbom_cbo_clean(); + __builtin_riscv_zicbom_cbo_clean(0); + __builtin_riscv_zicbom_cbo_clean(var); + __builtin_riscv_zicbom_cbo_clean(0x111); } -int foo2() +void foo2() { - return __builtin_riscv_zicbom_cbo_flush(); + __builtin_riscv_zicbom_cbo_flush(0); + __builtin_riscv_zicbom_cbo_flush(var); + __builtin_riscv_zicbom_cbo_flush(0x111); } -int foo3() +void foo3() { - return __builtin_riscv_zicbom_cbo_inval(); + __builtin_riscv_zicbom_cbo_inval(0); + __builtin_riscv_zicbom_cbo_inval(var); + __builtin_riscv_zicbom_cbo_inval(0x111); } -/* { dg-final { scan-assembler-times "cbo.clean" 1 } } */ -/* { dg-final { scan-assembler-times "cbo.flush" 1 } } */ -/* { dg-final { scan-assembler-times "cbo.inval" 1 } } */ +/* { dg-final { scan-assembler-times "cbo.clean" 3 } } */ +/* { dg-final { scan-assembler-times "cbo.flush" 3 } } */ +/* { dg-final { scan-assembler-times "cbo.inval" 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c index 96c1674ef2d..a239f24e9a8 100644 --- a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c +++ b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c @@ -1,9 +1,12 @@ /* { dg-do compile } */ /* { dg-options "-march=rv64gc_zicboz -mabi=lp64" } */ +int var; -int foo1() +void foo1() { - return __builtin_riscv_zicboz_cbo_zero(); + __builtin_riscv_zicboz_cbo_zero(0); + __builtin_riscv_zicboz_cbo_zero(var); + __builtin_riscv_zicboz_cbo_zero(0x121); } -/* { dg-final { scan-assembler-times "cbo.zero" 1 } } */ +/* { dg-final { scan-assembler-times "cbo.zero" 3 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c index 9d99839b1e7..e31da1a5206 100644 --- a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c +++ b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c @@ -1,9 +1,12 @@ /* { dg-do compile } */ /* { dg-options "-march=rv32gc_zicboz -mabi=ilp32" } */ +int var; -int foo1() +void foo1() { - return __builtin_riscv_zicboz_cbo_zero(); + __builtin_riscv_zicboz_cbo_zero(0); + __builtin_riscv_zicboz_cbo_zero(var); + __builtin_riscv_zicboz_cbo_zero(0x121); } -/* { dg-final { scan-assembler-times "cbo.zero" 1 } } */ +/* { dg-final { scan-assembler-times "cbo.zero" 3 } } */