From patchwork Sat May 7 05:05:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 1627817 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=F/+RzOWP; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KwFkm5lM0z9sG6 for ; Sat, 7 May 2022 15:05:51 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3EE963856254 for ; Sat, 7 May 2022 05:05:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3EE963856254 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1651899948; bh=WDG+fAZyW35fWvgxAoWVeNhTnVHs0UFsOQIil3x9xco=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=F/+RzOWPlxBs1x7uQqoxr7Xk7y+0iTnN8LuV4guecoLTG0aUghi+lgo9/mv4kTdDw xArLpgbWcNjbudvFcMLVzdJAlhYfUNZiJuDINffxoOZJogZDzKMCauNrGwWNOXuw8I YgSG6BP7IowFoQ6hPjDClR2DOP8tDM/6U+ecMA9o= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by sourceware.org (Postfix) with ESMTPS id 2CCAB3858C53 for ; Sat, 7 May 2022 05:05:27 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 2CCAB3858C53 X-IronPort-AV: E=McAfee;i="6400,9594,10339"; a="256139511" X-IronPort-AV: E=Sophos;i="5.91,206,1647327600"; d="scan'208";a="256139511" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 May 2022 22:05:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,206,1647327600"; d="scan'208";a="518362124" Received: from scymds01.sc.intel.com ([10.148.94.138]) by orsmga003.jf.intel.com with ESMTP; 06 May 2022 22:05:24 -0700 Received: from shliclel051.sh.intel.com (shliclel051.sh.intel.com [10.239.236.51]) by scymds01.sc.intel.com with ESMTP id 24755NDX031394; Fri, 6 May 2022 22:05:24 -0700 To: gcc-patches@gcc.gnu.org Subject: [PATCH] Expand __builtin_memcmp_eq with ptest for OImode. Date: Sat, 7 May 2022 13:05:23 +0800 Message-Id: <20220507050523.8554-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: References: X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: liuhongt Reply-To: liuhongt Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" This is adjusted patch only for OImode. Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ok for trunk? gcc/ChangeLog: PR target/104610 * config/i386/i386-expand.cc (ix86_expand_branch): Use ptest for QImode when code is EQ or NE. * config/i386/sse.md (cbranch4): Extend to OImode. gcc/testsuite/ChangeLog: * gcc.target/i386/pr104610.c: New test. --- gcc/config/i386/i386-expand.cc | 10 +++++++++- gcc/config/i386/sse.md | 8 ++++++-- gcc/testsuite/gcc.target/i386/pr104610.c | 15 +++++++++++++++ 3 files changed, 30 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr104610.c diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index bc806ffa283..c2f8776102c 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -2267,11 +2267,19 @@ ix86_expand_branch (enum rtx_code code, rtx op0, rtx op1, rtx label) /* Handle special case - vector comparsion with boolean result, transform it using ptest instruction. */ - if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT) + if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT + || (mode == OImode && (code == EQ || code == NE))) { rtx flag = gen_rtx_REG (CCZmode, FLAGS_REG); machine_mode p_mode = GET_MODE_SIZE (mode) == 32 ? V4DImode : V2DImode; + if (mode == OImode) + { + op0 = lowpart_subreg (p_mode, force_reg (mode, op0), mode); + op1 = lowpart_subreg (p_mode, force_reg (mode, op1), mode); + mode = p_mode; + } + gcc_assert (code == EQ || code == NE); /* Generate XOR since we can't check that one operand is zero vector. */ tmp = gen_reg_rtx (mode); diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 7b791def542..9514b8e0234 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -26034,10 +26034,14 @@ (define_expand "maskstore" (match_operand: 2 "register_operand")))] "TARGET_AVX512BW") +(define_mode_iterator VI48_OI_AVX + [(V8SI "TARGET_AVX") (V4DI "TARGET_AVX") (OI "TARGET_AVX") + V4SI V2DI]) + (define_expand "cbranch4" [(set (reg:CC FLAGS_REG) - (compare:CC (match_operand:VI48_AVX 1 "register_operand") - (match_operand:VI48_AVX 2 "nonimmediate_operand"))) + (compare:CC (match_operand:VI48_OI_AVX 1 "register_operand") + (match_operand:VI48_OI_AVX 2 "nonimmediate_operand"))) (set (pc) (if_then_else (match_operator 0 "bt_comparison_operator" [(reg:CC FLAGS_REG) (const_int 0)]) diff --git a/gcc/testsuite/gcc.target/i386/pr104610.c b/gcc/testsuite/gcc.target/i386/pr104610.c new file mode 100644 index 00000000000..00866238bd7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr104610.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mmove-max=256 -mstore-max=256" } */ +/* { dg-final { scan-assembler-times {(?n)vptest.*ymm} 1 } } */ +/* { dg-final { scan-assembler-times {sete} 1 } } */ +/* { dg-final { scan-assembler-not {(?n)je.*L[0-9]} } } */ +/* { dg-final { scan-assembler-not {(?n)jne.*L[0-9]} } } */ + + +#include +__attribute__((target("avx"))) +bool f256(char *a) +{ + char t[] = "0123456789012345678901234567890"; + return __builtin_memcmp(a, &t[0], sizeof(t)) == 0; +}