diff mbox series

[i386] Don't fold __builtin_ia32_blendvpd w/o sse4.2.

Message ID 20220316081734.68900-1-hongtao.liu@intel.com
State New
Headers show
Series [i386] Don't fold __builtin_ia32_blendvpd w/o sse4.2. | expand

Commit Message

liuhongt March 16, 2022, 8:17 a.m. UTC
__builtin_ia32_blendvpd is defined under sse4.1 and gimple folded
to ((v2di) c) < 0 ? b : a where vec_cmpv2di is under sse4.2 w/o which
it's veclowered to scalar operations and not combined back in rtl.

Bootstrap and regtest on x86_64-pc-linux-gnu{-m32,}.
Ready push to main trunk.

gcc/ChangeLog:

	PR target/104946
	* config/i386/i386-builtin.def (BDESC): Add
	CODE_FOR_sse4_1_blendvpd for IX86_BUILTIN_BLENDVPD.
	* config/i386/i386.cc (ix86_gimple_fold_builtin): Don't fold
	__builtin_ia32_blendvpd w/o sse4.2

gcc/testsuite/ChangeLog:

	* gcc.target/i386/sse4_1-blendvpd-1.c: New test.
---
 gcc/config/i386/i386-builtin.def                  |  2 +-
 gcc/config/i386/i386.cc                           |  8 +++++++-
 gcc/testsuite/gcc.target/i386/sse4_1-blendvpd-1.c | 11 +++++++++++
 3 files changed, 19 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/i386/sse4_1-blendvpd-1.c

Comments

Richard Biener March 16, 2022, 8:41 a.m. UTC | #1
On Wed, Mar 16, 2022 at 9:18 AM liuhongt via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> __builtin_ia32_blendvpd is defined under sse4.1 and gimple folded
> to ((v2di) c) < 0 ? b : a where vec_cmpv2di is under sse4.2 w/o which
> it's veclowered to scalar operations and not combined back in rtl.
>
> Bootstrap and regtest on x86_64-pc-linux-gnu{-m32,}.
> Ready push to main trunk.

OK.

Richard.

> gcc/ChangeLog:
>
>         PR target/104946
>         * config/i386/i386-builtin.def (BDESC): Add
>         CODE_FOR_sse4_1_blendvpd for IX86_BUILTIN_BLENDVPD.
>         * config/i386/i386.cc (ix86_gimple_fold_builtin): Don't fold
>         __builtin_ia32_blendvpd w/o sse4.2
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/i386/sse4_1-blendvpd-1.c: New test.
> ---
>  gcc/config/i386/i386-builtin.def                  |  2 +-
>  gcc/config/i386/i386.cc                           |  8 +++++++-
>  gcc/testsuite/gcc.target/i386/sse4_1-blendvpd-1.c | 11 +++++++++++
>  3 files changed, 19 insertions(+), 2 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/i386/sse4_1-blendvpd-1.c
>
> diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
> index ea327555639..b410102614d 100644
> --- a/gcc/config/i386/i386-builtin.def
> +++ b/gcc/config/i386/i386-builtin.def
> @@ -906,7 +906,7 @@ BDESC (OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_MMX, 0, CODE_FOR_ssse3_palignrdi,
>  /* SSE4.1 */
>  BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_blendpd, "__builtin_ia32_blendpd", IX86_BUILTIN_BLENDPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_INT)
>  BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_blendps, "__builtin_ia32_blendps", IX86_BUILTIN_BLENDPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_INT)
> -BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_nothing, "__builtin_ia32_blendvpd", IX86_BUILTIN_BLENDVPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_V2DF)
> +BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_blendvpd, "__builtin_ia32_blendvpd", IX86_BUILTIN_BLENDVPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_V2DF)
>  BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_nothing, "__builtin_ia32_blendvps", IX86_BUILTIN_BLENDVPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF)
>  BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_dppd, "__builtin_ia32_dppd", IX86_BUILTIN_DPPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_INT)
>  BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_dpps, "__builtin_ia32_dpps", IX86_BUILTIN_DPPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_INT)
> diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
> index d77ad83e437..5a561966eb4 100644
> --- a/gcc/config/i386/i386.cc
> +++ b/gcc/config/i386/i386.cc
> @@ -18368,10 +18368,16 @@ ix86_gimple_fold_builtin (gimple_stmt_iterator *gsi)
>         }
>        break;
>
> +    case IX86_BUILTIN_BLENDVPD:
> +      /* blendvpd is under sse4.1 but pcmpgtq is under sse4.2,
> +        w/o sse4.2, it's veclowered to scalar operations and
> +        not combined back.  */
> +      if (!TARGET_SSE4_2)
> +       break;
> +      /* FALLTHRU.  */
>      case IX86_BUILTIN_PBLENDVB128:
>      case IX86_BUILTIN_PBLENDVB256:
>      case IX86_BUILTIN_BLENDVPS:
> -    case IX86_BUILTIN_BLENDVPD:
>      case IX86_BUILTIN_BLENDVPS256:
>      case IX86_BUILTIN_BLENDVPD256:
>        gcc_assert (n_args == 3);
> diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-blendvpd-1.c b/gcc/testsuite/gcc.target/i386/sse4_1-blendvpd-1.c
> new file mode 100644
> index 00000000000..c25d3fbcbd4
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/sse4_1-blendvpd-1.c
> @@ -0,0 +1,11 @@
> +/* { dg-do compile } */
> +/* { dg-options "-msse4.1 -O2 -mno-sse4.2" } */
> +/* { dg-final { scan-assembler-times {(?n)blendvpd[ \t]+%xmm[0-9]+} 1 } } */
> +
> +#include <immintrin.h>
> +
> +__m128d
> +foo (__m128d a, __m128d b, __m128d c)
> +{
> +  return _mm_blendv_pd (a, b, c);
> +}
> --
> 2.18.1
>
diff mbox series

Patch

diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index ea327555639..b410102614d 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -906,7 +906,7 @@  BDESC (OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_MMX, 0, CODE_FOR_ssse3_palignrdi,
 /* SSE4.1 */
 BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_blendpd, "__builtin_ia32_blendpd", IX86_BUILTIN_BLENDPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_INT)
 BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_blendps, "__builtin_ia32_blendps", IX86_BUILTIN_BLENDPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_INT)
-BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_nothing, "__builtin_ia32_blendvpd", IX86_BUILTIN_BLENDVPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_V2DF)
+BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_blendvpd, "__builtin_ia32_blendvpd", IX86_BUILTIN_BLENDVPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_V2DF)
 BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_nothing, "__builtin_ia32_blendvps", IX86_BUILTIN_BLENDVPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF)
 BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_dppd, "__builtin_ia32_dppd", IX86_BUILTIN_DPPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_INT)
 BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_dpps, "__builtin_ia32_dpps", IX86_BUILTIN_DPPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_INT)
diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index d77ad83e437..5a561966eb4 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -18368,10 +18368,16 @@  ix86_gimple_fold_builtin (gimple_stmt_iterator *gsi)
 	}
       break;
 
+    case IX86_BUILTIN_BLENDVPD:
+      /* blendvpd is under sse4.1 but pcmpgtq is under sse4.2,
+	 w/o sse4.2, it's veclowered to scalar operations and
+	 not combined back.  */
+      if (!TARGET_SSE4_2)
+	break;
+      /* FALLTHRU.  */
     case IX86_BUILTIN_PBLENDVB128:
     case IX86_BUILTIN_PBLENDVB256:
     case IX86_BUILTIN_BLENDVPS:
-    case IX86_BUILTIN_BLENDVPD:
     case IX86_BUILTIN_BLENDVPS256:
     case IX86_BUILTIN_BLENDVPD256:
       gcc_assert (n_args == 3);
diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-blendvpd-1.c b/gcc/testsuite/gcc.target/i386/sse4_1-blendvpd-1.c
new file mode 100644
index 00000000000..c25d3fbcbd4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse4_1-blendvpd-1.c
@@ -0,0 +1,11 @@ 
+/* { dg-do compile } */
+/* { dg-options "-msse4.1 -O2 -mno-sse4.2" } */
+/* { dg-final { scan-assembler-times {(?n)blendvpd[ \t]+%xmm[0-9]+} 1 } } */
+
+#include <immintrin.h>
+
+__m128d
+foo (__m128d a, __m128d b, __m128d c)
+{
+  return _mm_blendv_pd (a, b, c);
+}