@@ -172,8 +172,8 @@ (define_predicate "symbol_ref_function_operand"
return SYMBOL_REF_FUNCTION_P (op);
})
-(define_attr "predicable" "false,true"
- (const_string "true"))
+(define_attr "predicable" "no,yes"
+ (const_string "yes"))
(define_cond_exec
[(match_operator 0 "predicate_operator"
@@ -911,7 +911,7 @@ (define_insn "br_true"
(pc)))]
""
"%j0\\tbra\\t%l1;"
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
(define_insn "br_false"
[(set (pc)
@@ -921,7 +921,7 @@ (define_insn "br_false"
(pc)))]
""
"%J0\\tbra\\t%l1;"
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
;; unified conditional branch
(define_insn "br_true_uni"
@@ -931,7 +931,7 @@ (define_insn "br_true_uni"
(label_ref (match_operand 1 "" "")) (pc)))]
""
"%j0\\tbra.uni\\t%l1;"
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
(define_insn "br_false_uni"
[(set (pc) (if_then_else
@@ -940,7 +940,7 @@ (define_insn "br_false_uni"
(label_ref (match_operand 1 "" "")) (pc)))]
""
"%J0\\tbra.uni\\t%l1;"
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
(define_expand "cbranch<mode>4"
[(set (pc)
@@ -1619,7 +1619,7 @@ (define_insn "return"
{
return nvptx_output_return ();
}
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
(define_expand "epilogue"
[(clobber (const_int 0))]
@@ -1712,7 +1712,7 @@ (define_insn "trap_if_true"
(const_int 0))]
""
"%j0 trap; %j0 exit;"
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
(define_insn "trap_if_false"
[(trap_if (eq (match_operand:BI 0 "nvptx_register_operand" "R")
@@ -1720,7 +1720,7 @@ (define_insn "trap_if_false"
(const_int 0))]
""
"%J0 trap; %J0 exit;"
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
(define_expand "ctrap<mode>4"
[(trap_if (match_operator 0 "nvptx_comparison_operator"
@@ -1769,28 +1769,28 @@ (define_insn "nvptx_fork"
UNSPECV_FORK)]
""
"// fork %0;"
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
(define_insn "nvptx_forked"
[(unspec_volatile:SI [(match_operand:SI 0 "const_int_operand" "")]
UNSPECV_FORKED)]
""
"// forked %0;"
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
(define_insn "nvptx_joining"
[(unspec_volatile:SI [(match_operand:SI 0 "const_int_operand" "")]
UNSPECV_JOINING)]
""
"// joining %0;"
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
(define_insn "nvptx_join"
[(unspec_volatile:SI [(match_operand:SI 0 "const_int_operand" "")]
UNSPECV_JOIN)]
""
"// join %0;"
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
(define_expand "oacc_fork"
[(set (match_operand:SI 0 "nvptx_nonmemory_operand" "")
@@ -2035,7 +2035,7 @@ (define_insn "atomic_compare_and_swap<mode>_1_local"
output_asm_insn ("}", NULL);
return "";
}
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
(define_insn "atomic_compare_and_swap<mode>_1"
[(set (match_operand:SDIM 0 "nvptx_register_operand" "=R")
@@ -2263,7 +2263,7 @@ (define_insn "nvptx_barsync"
? "\\tbarrier.sync\\t%0, %1;"
: "\\tbar.sync\\t%0, %1;");
}
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
(define_insn "nvptx_warpsync"
[(unspec_volatile [(const_int 0)] UNSPECV_WARPSYNC)]
@@ -2310,7 +2310,7 @@ (define_insn "*memory_barrier"
(unspec_volatile:BLK [(match_dup 0)] UNSPECV_MEMBAR))]
""
"\\tmembar.sys;"
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
(define_expand "nvptx_membar_cta"
[(set (match_dup 0)
@@ -2326,7 +2326,7 @@ (define_insn "*nvptx_membar_cta"
(unspec_volatile:BLK [(match_dup 0)] UNSPECV_MEMBAR_CTA))]
""
"\\tmembar.cta;"
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
(define_expand "nvptx_membar_gl"
[(set (match_dup 0)
@@ -2342,13 +2342,13 @@ (define_insn "*nvptx_membar_gl"
(unspec_volatile:BLK [(match_dup 0)] UNSPECV_MEMBAR_GL))]
""
"\\tmembar.gl;"
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
(define_insn "nvptx_nounroll"
[(unspec_volatile [(const_int 0)] UNSPECV_NOUNROLL)]
""
"\\t.pragma \\\"nounroll\\\";"
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
(define_insn "nvptx_red_partition"
[(set (match_operand:DI 0 "nonimmediate_operand" "=R")
@@ -2358,7 +2358,7 @@ (define_insn "nvptx_red_partition"
{
return nvptx_output_red_partition (operands[0], operands[1]);
}
- [(set_attr "predicable" "false")])
+ [(set_attr "predicable" "no")])
;; Expand QI mode operations using SI mode instructions.
(define_code_iterator any_sbinary [plus minus smin smax])