@@ -302,7 +302,7 @@ (define_mode_iterator V_256H
;; All 128bit and 256bit vector modes
(define_mode_iterator V_128_256
- [V32QI V16QI V16HI V8HI V8SI V4SI V4DI V2DI V8SF V4SF V4DF V2DF])
+ [V32QI V16QI V16HI V8HI V8SI V4SI V4DI V2DI V16HF V8HF V8SF V4SF V4DF V2DF])
;; All 512bit vector modes
(define_mode_iterator V_512 [V64QI V32HI V16SI V8DI V16SF V8DF])
@@ -903,9 +903,9 @@ (define_mode_attr avxsizesuffix
[(V64QI "512") (V32HI "512") (V16SI "512") (V8DI "512")
(V32QI "256") (V16HI "256") (V8SI "256") (V4DI "256")
(V16QI "") (V8HI "") (V4SI "") (V2DI "")
- (V16SF "512") (V8DF "512")
- (V8SF "256") (V4DF "256")
- (V4SF "") (V2DF "")])
+ (V32HF "512") (V16SF "512") (V8DF "512")
+ (V16HF "256") (V8SF "256") (V4DF "256")
+ (V8HF "") (V4SF "") (V2DF "")])
;; SSE instruction mode
(define_mode_attr sseinsnmode
new file mode 100644
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O1 -mxop" } */
+
+typedef _Float16 v16hf __attribute__((vector_size(32)));
+typedef _Float16 v8hf __attribute__((vector_size(16)));
+v8hf f1() {
+ int i;
+ v8hf z;
+ z[i] = i;
+ return z;
+}
+
+v16hf f2() {
+ int i;
+ v16hf z;
+ z[i] = i;
+ return z;
+}