| Message ID | 20211104144109.308907-1-hjl.tools@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | x86: Check leal/addl gcc.target/i386/amxtile-3.c for x32 | expand |
On Thu, Nov 4, 2021 at 3:44 PM H.J. Lu via Gcc-patches <gcc-patches@gcc.gnu.org> wrote: > > Check leal and addl for x32 to fix: > > FAIL: gcc.target/i386/amxtile-3.c scan-assembler addq[ \\t]+\\$12 > FAIL: gcc.target/i386/amxtile-3.c scan-assembler leaq[ \\t]+4 > FAIL: gcc.target/i386/amxtile-3.c scan-assembler leaq[ \\t]+8 > > * gcc.target/i386/amxtile-3.c: Check leal/addl for x32. > --- > gcc/testsuite/gcc.target/i386/amxtile-3.c | 18 ++++++++++++------ > 1 file changed, 12 insertions(+), 6 deletions(-) > > diff --git a/gcc/testsuite/gcc.target/i386/amxtile-3.c b/gcc/testsuite/gcc.target/i386/amxtile-3.c > index 31b34d0ed15..26204e385c6 100644 > --- a/gcc/testsuite/gcc.target/i386/amxtile-3.c > +++ b/gcc/testsuite/gcc.target/i386/amxtile-3.c > @@ -3,12 +3,18 @@ > /* { dg-final { scan-assembler "tileloadd\[ \\t]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)+\[^\n\]*%tmm\[0-9\]" } } */ > /* { dg-final { scan-assembler "tileloaddt1\[ \\t]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)+\[^\n\]*%tmm\[0-9\]" } } */ > /* { dg-final { scan-assembler "tilestored\[ \\t]+\[^\n\]*%tmm\[0-9\]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)" } } */ > -/* { dg-final { scan-assembler "leaq\[ \\t]+4" } } */ > -/* { dg-final { scan-assembler "leaq\[ \\t]+8" } } */ > -/* { dg-final { scan-assembler "addq\[ \\t]+\\\$12" } } */ > -/* { dg-final { scan-assembler-not "leaq\[ \\t]+1" } } */ > -/* { dg-final { scan-assembler-not "leaq\[ \\t]+2" } } */ > -/* { dg-final { scan-assembler-not "addq\[ \\t]+\\\$3" } } */ > +/* { dg-final { scan-assembler "leaq\[ \\t]+4" { target lp64 } } } */ > +/* { dg-final { scan-assembler "leaq\[ \\t]+8" { target lp64 } } } */ > +/* { dg-final { scan-assembler "addq\[ \\t]+\\\$12" { target lp64 } } } */ > +/* { dg-final { scan-assembler "leal\[ \\t]+4" { target x32 } } } */ > +/* { dg-final { scan-assembler "leal\[ \\t]+8" { target x32 } } } */ > +/* { dg-final { scan-assembler "addl\[ \\t]+\\\$12" { target x32 } } } */ > +/* { dg-final { scan-assembler-not "leaq\[ \\t]+1" { target lp64 } } } */ > +/* { dg-final { scan-assembler-not "leaq\[ \\t]+2" { target lp64 } } } */ > +/* { dg-final { scan-assembler-not "addq\[ \\t]+\\\$3" { target lp64 } } } */ > +/* { dg-final { scan-assembler-not "leal\[ \\t]+1" { target x32 } } } */ > +/* { dg-final { scan-assembler-not "leal\[ \\t]+2" { target x32 } } } */ > +/* { dg-final { scan-assembler-not "addl\[ \\t]+\\\$3" { target x32 } } } */ Probably we can just use e.g. "lea(l|q)\[ \\t]" and "add(l|q)\[ \\t]" without affecting scan tests. Uros.
On Thu, Nov 4, 2021 at 1:08 PM Uros Bizjak <ubizjak@gmail.com> wrote: > > On Thu, Nov 4, 2021 at 3:44 PM H.J. Lu via Gcc-patches > <gcc-patches@gcc.gnu.org> wrote: > > > > Check leal and addl for x32 to fix: > > > > FAIL: gcc.target/i386/amxtile-3.c scan-assembler addq[ \\t]+\\$12 > > FAIL: gcc.target/i386/amxtile-3.c scan-assembler leaq[ \\t]+4 > > FAIL: gcc.target/i386/amxtile-3.c scan-assembler leaq[ \\t]+8 > > > > * gcc.target/i386/amxtile-3.c: Check leal/addl for x32. > > --- > > gcc/testsuite/gcc.target/i386/amxtile-3.c | 18 ++++++++++++------ > > 1 file changed, 12 insertions(+), 6 deletions(-) > > > > diff --git a/gcc/testsuite/gcc.target/i386/amxtile-3.c b/gcc/testsuite/gcc.target/i386/amxtile-3.c > > index 31b34d0ed15..26204e385c6 100644 > > --- a/gcc/testsuite/gcc.target/i386/amxtile-3.c > > +++ b/gcc/testsuite/gcc.target/i386/amxtile-3.c > > @@ -3,12 +3,18 @@ > > /* { dg-final { scan-assembler "tileloadd\[ \\t]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)+\[^\n\]*%tmm\[0-9\]" } } */ > > /* { dg-final { scan-assembler "tileloaddt1\[ \\t]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)+\[^\n\]*%tmm\[0-9\]" } } */ > > /* { dg-final { scan-assembler "tilestored\[ \\t]+\[^\n\]*%tmm\[0-9\]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)" } } */ > > -/* { dg-final { scan-assembler "leaq\[ \\t]+4" } } */ > > -/* { dg-final { scan-assembler "leaq\[ \\t]+8" } } */ > > -/* { dg-final { scan-assembler "addq\[ \\t]+\\\$12" } } */ > > -/* { dg-final { scan-assembler-not "leaq\[ \\t]+1" } } */ > > -/* { dg-final { scan-assembler-not "leaq\[ \\t]+2" } } */ > > -/* { dg-final { scan-assembler-not "addq\[ \\t]+\\\$3" } } */ > > +/* { dg-final { scan-assembler "leaq\[ \\t]+4" { target lp64 } } } */ > > +/* { dg-final { scan-assembler "leaq\[ \\t]+8" { target lp64 } } } */ > > +/* { dg-final { scan-assembler "addq\[ \\t]+\\\$12" { target lp64 } } } */ > > +/* { dg-final { scan-assembler "leal\[ \\t]+4" { target x32 } } } */ > > +/* { dg-final { scan-assembler "leal\[ \\t]+8" { target x32 } } } */ > > +/* { dg-final { scan-assembler "addl\[ \\t]+\\\$12" { target x32 } } } */ > > +/* { dg-final { scan-assembler-not "leaq\[ \\t]+1" { target lp64 } } } */ > > +/* { dg-final { scan-assembler-not "leaq\[ \\t]+2" { target lp64 } } } */ > > +/* { dg-final { scan-assembler-not "addq\[ \\t]+\\\$3" { target lp64 } } } */ > > +/* { dg-final { scan-assembler-not "leal\[ \\t]+1" { target x32 } } } */ > > +/* { dg-final { scan-assembler-not "leal\[ \\t]+2" { target x32 } } } */ > > +/* { dg-final { scan-assembler-not "addl\[ \\t]+\\\$3" { target x32 } } } */ > > Probably we can just use e.g. "lea(l|q)\[ \\t]" and "add(l|q)\[ \\t]" > without affecting scan tests. > I will keep it in mind. Thanks.
diff --git a/gcc/testsuite/gcc.target/i386/amxtile-3.c b/gcc/testsuite/gcc.target/i386/amxtile-3.c index 31b34d0ed15..26204e385c6 100644 --- a/gcc/testsuite/gcc.target/i386/amxtile-3.c +++ b/gcc/testsuite/gcc.target/i386/amxtile-3.c @@ -3,12 +3,18 @@ /* { dg-final { scan-assembler "tileloadd\[ \\t]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)+\[^\n\]*%tmm\[0-9\]" } } */ /* { dg-final { scan-assembler "tileloaddt1\[ \\t]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)+\[^\n\]*%tmm\[0-9\]" } } */ /* { dg-final { scan-assembler "tilestored\[ \\t]+\[^\n\]*%tmm\[0-9\]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)" } } */ -/* { dg-final { scan-assembler "leaq\[ \\t]+4" } } */ -/* { dg-final { scan-assembler "leaq\[ \\t]+8" } } */ -/* { dg-final { scan-assembler "addq\[ \\t]+\\\$12" } } */ -/* { dg-final { scan-assembler-not "leaq\[ \\t]+1" } } */ -/* { dg-final { scan-assembler-not "leaq\[ \\t]+2" } } */ -/* { dg-final { scan-assembler-not "addq\[ \\t]+\\\$3" } } */ +/* { dg-final { scan-assembler "leaq\[ \\t]+4" { target lp64 } } } */ +/* { dg-final { scan-assembler "leaq\[ \\t]+8" { target lp64 } } } */ +/* { dg-final { scan-assembler "addq\[ \\t]+\\\$12" { target lp64 } } } */ +/* { dg-final { scan-assembler "leal\[ \\t]+4" { target x32 } } } */ +/* { dg-final { scan-assembler "leal\[ \\t]+8" { target x32 } } } */ +/* { dg-final { scan-assembler "addl\[ \\t]+\\\$12" { target x32 } } } */ +/* { dg-final { scan-assembler-not "leaq\[ \\t]+1" { target lp64 } } } */ +/* { dg-final { scan-assembler-not "leaq\[ \\t]+2" { target lp64 } } } */ +/* { dg-final { scan-assembler-not "addq\[ \\t]+\\\$3" { target lp64 } } } */ +/* { dg-final { scan-assembler-not "leal\[ \\t]+1" { target x32 } } } */ +/* { dg-final { scan-assembler-not "leal\[ \\t]+2" { target x32 } } } */ +/* { dg-final { scan-assembler-not "addl\[ \\t]+\\\$3" { target x32 } } } */ #include <immintrin.h> extern int a[];