From patchwork Mon Oct 11 06:26:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 1539135 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=hDu6b78M; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HSTN26cZTz9sPB for ; Mon, 11 Oct 2021 17:26:41 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 13BFC385800D for ; Mon, 11 Oct 2021 06:26:38 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 13BFC385800D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1633933598; bh=gG4i0jJRIZrG4wuam1DHj/JHdJQhkb6OwiNR28eaGLE=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=hDu6b78M/vKno3yhDsnVJ1RB+H/EEtrknUwko5HeBMNx6L0pCot/SJKzoqyna7u2m Btly/rjfuLSDxEmAncpZu6u8fU4z7T5GF6M5J8VA3awuyNdHl4MFAEcY7Es1IUkAfn s4MFmEfU4vYmzg0m1Aln8QXCJZjEcpzMPqnGjNVg= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by sourceware.org (Postfix) with ESMTPS id BAD073858D28 for ; Mon, 11 Oct 2021 06:26:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org BAD073858D28 X-IronPort-AV: E=McAfee;i="6200,9189,10133"; a="213752945" X-IronPort-AV: E=Sophos;i="5.85,363,1624345200"; d="scan'208";a="213752945" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Oct 2021 23:26:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,363,1624345200"; d="scan'208";a="523699961" Received: from scymds01.sc.intel.com ([10.148.94.138]) by orsmga001.jf.intel.com with ESMTP; 10 Oct 2021 23:26:15 -0700 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.236.50]) by scymds01.sc.intel.com with ESMTP id 19B6QDPY014768; Sun, 10 Oct 2021 23:26:14 -0700 To: gcc-patches@gcc.gnu.org Subject: [PATCH][i386] Support reduc_{plus,smax,smin,umax,umin}_scal_v4qi. Date: Mon, 11 Oct 2021 14:26:13 +0800 Message-Id: <20211011062613.96314-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.18.1 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: liuhongt Reply-To: liuhongt Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" After providing expanders for reduc_umin/umax/smin/smax_scal_v4qi, perfomance are a little bit faster than before for reduce operations w/ options -O2 -march=haswell, -O2 -march=skylake-avx512 and -Ofast -march=skylake-avx512. gcc/ChangeLog PR target/102483 * config/i386/i386-expand.c (emit_reduc_half): Handle V4QImode. * config/i386/mmx.md (reduc__scal_v4qi): New expander. (reduc_plus_scal_v4qi): Ditto. gcc/testsuite/ChangeLog * gcc.target/i386/pr102483.c: New test. * gcc.target/i386/pr102483-2.c: New test. --- gcc/config/i386/i386-expand.c | 5 ++ gcc/config/i386/mmx.md | 45 +++++++++++++++++ gcc/testsuite/gcc.target/i386/pr102483-2.c | 26 ++++++++++ gcc/testsuite/gcc.target/i386/pr102483.c | 58 ++++++++++++++++++++++ 4 files changed, 134 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr102483-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr102483.c diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c index 3e6f7d8ef7e..4badeeeee9e 100644 --- a/gcc/config/i386/i386-expand.c +++ b/gcc/config/i386/i386-expand.c @@ -16043,6 +16043,11 @@ emit_reduc_half (rtx dest, rtx src, int i) case E_V2DFmode: tem = gen_vec_interleave_highv2df (dest, src, src); break; + case E_V4QImode: + d = gen_reg_rtx (V1SImode); + tem = gen_mmx_lshrv1si3 (d, gen_lowpart (V1SImode, src), + GEN_INT (i / 2)); + break; case E_V4HImode: d = gen_reg_rtx (V1DImode); tem = gen_mmx_lshrv1di3 (d, gen_lowpart (V1DImode, src), diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 106d41c8fd9..6c5cbcfa52c 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -3989,6 +3989,18 @@ (define_expand "reduc__scal_v4hi" DONE; }) +(define_expand "reduc__scal_v4qi" + [(smaxmin:V4QI + (match_operand:QI 0 "register_operand") + (match_operand:V4QI 1 "register_operand"))] + "TARGET_SSE4_1" +{ + rtx tmp = gen_reg_rtx (V4QImode); + ix86_expand_reduc (gen_v4qi3, tmp, operands[1]); + emit_insn (gen_vec_extractv4qiqi (operands[0], tmp, const0_rtx)); + DONE; +}) + (define_expand "reduc__scal_v4hi" [(umaxmin:V4HI (match_operand:HI 0 "register_operand") @@ -4001,6 +4013,39 @@ (define_expand "reduc__scal_v4hi" DONE; }) +(define_expand "reduc__scal_v4qi" + [(umaxmin:V4QI + (match_operand:QI 0 "register_operand") + (match_operand:V4QI 1 "register_operand"))] + "TARGET_SSE4_1" +{ + rtx tmp = gen_reg_rtx (V4QImode); + ix86_expand_reduc (gen_v4qi3, tmp, operands[1]); + emit_insn (gen_vec_extractv4qiqi (operands[0], tmp, const0_rtx)); + DONE; +}) + +(define_expand "reduc_plus_scal_v4qi" + [(plus:V4QI + (match_operand:QI 0 "register_operand") + (match_operand:V4QI 1 "register_operand"))] + "TARGET_SSE2" +{ + rtx op1 = gen_reg_rtx (V16QImode); + emit_insn (gen_vec_setv4si_0 (lowpart_subreg (V4SImode, op1, V16QImode), + CONST0_RTX (V4SImode), + lowpart_subreg (SImode, + operands[1], + V4QImode))); + rtx tmp = gen_reg_rtx (V16QImode); + emit_move_insn (tmp, CONST0_RTX (V16QImode)); + rtx tmp2 = gen_reg_rtx (V2DImode); + emit_insn (gen_sse2_psadbw (tmp2, op1, tmp)); + tmp2 = gen_lowpart (V16QImode, tmp2); + emit_insn (gen_vec_extractv16qiqi (operands[0], tmp2, const0_rtx)); + DONE; +}) + (define_expand "usadv8qi" [(match_operand:V2SI 0 "register_operand") (match_operand:V8QI 1 "register_operand") diff --git a/gcc/testsuite/gcc.target/i386/pr102483-2.c b/gcc/testsuite/gcc.target/i386/pr102483-2.c new file mode 100644 index 00000000000..d477c53db08 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr102483-2.c @@ -0,0 +1,26 @@ +/* { dg-do run } */ +/* { dg-require-effective-target sse4 } */ +/* { dg-options "-O2 -msse4.1" } */ + +#include "sse4_1-check.h" + +#include "pr102483.c" + +static void +sse4_1_test () +{ + char p[4] = { -103, 23, 41, -56 }; + unsigned char up[4] = { 100, 30, 255, 9 }; + + char res = reduce_add (p); + if (res != -95) + abort (); + if (reduce_smin (p) != -103) + abort (); + if (reduce_smax (p) != 41) + abort (); + if (reduce_umin (up) != 9) + abort (); + if (reduce_umax (up) != 255) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/pr102483.c b/gcc/testsuite/gcc.target/i386/pr102483.c new file mode 100644 index 00000000000..681b57598ef --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr102483.c @@ -0,0 +1,58 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse4.1 -ftree-vectorize -fdump-tree-optimized" } */ +/* { dg-final { scan-tree-dump-times "\.REDUC_MIN" 2 "optimized" } } */ +/* { dg-final { scan-tree-dump-times "\.REDUC_MAX" 2 "optimized" } } */ +/* { dg-final { scan-tree-dump-times "\.REDUC_PLUS" 1 "optimized" } } */ + +char +__attribute__((noipa, optimize("Ofast"),target("sse4.1"))) +reduce_add (char* p) +{ + char sum = 0; + for (int i = 0; i != 4; i++) + sum += p[i]; + return sum; +} + +#define MAX(a, b) ((a) > (b) ? (a) : (b)) +#define MIN(a, b) ((a) > (b) ? (b) : (a)) + +unsigned char +__attribute__((noipa, optimize("Ofast"),target("sse4.1"))) +reduce_umax (unsigned char* p) +{ + unsigned char sum = p[0]; + for (int i = 0; i != 4; i++) + sum = MAX(sum, p[i]); + return sum; +} + +unsigned char +__attribute__((noipa, optimize("Ofast"),target("sse4.1"))) +reduce_umin (unsigned char* p) +{ + unsigned char sum = p[0]; + for (int i = 0; i != 4; i++) + sum = MIN(sum, p[i]); + return sum; +} + +char +__attribute__((noipa, optimize("Ofast"),target("sse4.1"))) +reduce_smax (char* p) +{ + char sum = p[0]; + for (int i = 0; i != 4; i++) + sum = MAX(sum, p[i]); + return sum; +} + +char +__attribute__((noipa, optimize("Ofast"),target("sse4.1"))) +reduce_smin (char* p) +{ + char sum = p[0]; + for (int i = 0; i != 4; i++) + sum = MIN(sum, p[i]); + return sum; +}