From patchwork Mon Sep 6 09:24:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 1524866 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=gRYHGy/6; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4H330n5ZpNz9sW4 for ; Mon, 6 Sep 2021 19:25:44 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 246F8383940E for ; Mon, 6 Sep 2021 09:25:42 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 246F8383940E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1630920342; bh=Mw6ksAt22Hz604Vpbi/luRanazvhUFl8JI4l5i3h0VM=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=gRYHGy/6sPl4EUJ3cNKdXwdSHYLY8uiIWyHK8pE8Mo3nPIHBIsHiVeJjL5vCKiy77 E3awInkygk5ShwnMcv5W4B//Pznjtbao91ARgegqtg3B33555VoRolGz/0U6Hzjvvm 6cmmx1Us+21fUvB9fkURBJBe2AGobf2Veyf+x/is= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by sourceware.org (Postfix) with ESMTPS id B3A7A3858400 for ; Mon, 6 Sep 2021 09:24:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org B3A7A3858400 X-IronPort-AV: E=McAfee;i="6200,9189,10098"; a="219617847" X-IronPort-AV: E=Sophos;i="5.85,271,1624345200"; d="scan'208";a="219617847" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Sep 2021 02:24:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,271,1624345200"; d="scan'208";a="536683628" Received: from scymds01.sc.intel.com ([10.148.94.138]) by FMSMGA003.fm.intel.com with ESMTP; 06 Sep 2021 02:24:55 -0700 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.236.50]) by scymds01.sc.intel.com with ESMTP id 1869OsK4032603; Mon, 6 Sep 2021 02:24:55 -0700 To: gcc-patches@gcc.gnu.org Subject: [PATCH] Adjust the wording for x86 _Float16 type. Date: Mon, 6 Sep 2021 17:24:54 +0800 Message-Id: <20210906092454.61611-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.18.1 X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: liuhongt Reply-To: liuhongt Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi: As discussed in [1], adjust the layout for x86 _Float16 description. Bootstrappedn and regtested on x86_64-linux-gnu{-m32,}. Ok for trunk? gcc/ChangeLog: * doc/extend.texi: (@node Floating Types): Adjust the wording. (@node Half-Precision): Ditto. --- gcc/doc/extend.texi | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 7fb22ed8063..1aa0118bb1f 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -1076,9 +1076,11 @@ systems where @code{__float128} is supported. The @code{_Float32} type is supported on all systems supporting IEEE binary32; the @code{_Float64} and @code{_Float32x} types are supported on all systems supporting IEEE binary64. The @code{_Float16} type is supported on AArch64 -systems by default, and on ARM systems when the IEEE format for 16-bit -floating-point types is selected with @option{-mfp16-format=ieee}. -GCC does not currently support @code{_Float128x} on any systems. +systems by default, and also on x86 systems with @code{target("sse2")} +for both C and C++. +On ARM systems when the IEEE format for 16-bit floating-point types is +selected with @option{-mfp16-format=ieee}. GCC does not currently support +@code{_Float128x} on any systems. On the i386, x86_64, IA-64, and HP-UX targets, you can declare complex types using the corresponding internal complex type, @code{XCmode} for @@ -1108,6 +1110,10 @@ On ARM and AArch64 targets, GCC supports half-precision (16-bit) floating point via the @code{__fp16} type defined in the ARM C Language Extensions. On ARM systems, you must enable this type explicitly with the @option{-mfp16-format} command-line option in order to use it. +On x86 targets with @code{target("sse2")} and above, GCC supports +half-precision (16-bit) floating point via the @code{_Float16} type. +For C++, x86 provide a builtin type named @code{_Float16} which contains +same data format as C. ARM targets support two incompatible representations for half-precision floating-point values. You must choose one of the representations and @@ -1151,16 +1157,11 @@ calls. It is recommended that portable code use the @code{_Float16} type defined by ISO/IEC TS 18661-3:2015. @xref{Floating Types}. -On x86 targets with @code{target("sse2")} and above, GCC supports half-precision -(16-bit) floating point via the @code{_Float16} type which is defined by -18661-3:2015. For C++, x86 provide a builtin type named @code{_Float16} -which contains same data format as C. - -Without @option{-mavx512fp16}, @code{_Float16} type is storage only, all -operations will be emulated by software emulation and the @code{float} -instructions. The default behavior for @code{FLT_EVAL_METHOD} is to keep -the intermediate result of the operation as 32-bit precision. This may lead -to inconsistent behavior between software emulation and AVX512-FP16 +On x86 targets, without @option{-mavx512fp16}, @code{_Float16} type is +storage only, all operations will be emulated by software emulation and the +@code{float} instructions. The default behavior for @code{FLT_EVAL_METHOD} is +to keep the intermediate result of the operation as 32-bit precision. This may +lead to inconsistent behavior between software emulation and AVX512-FP16 instructions. @node Decimal Float