From patchwork Thu Jul 1 06:15:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liu, Hongtao" X-Patchwork-Id: 1499285 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=RJfvxTtU; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GFp1X2ZYDz9sWX for ; Thu, 1 Jul 2021 16:18:24 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7B32F3848015 for ; Thu, 1 Jul 2021 06:18:21 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7B32F3848015 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1625120301; bh=xyLMcfez3JjDufPuCo97rBgXgFL8eavirlwtSncBcBw=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=RJfvxTtUmEE1yGvjQ0B3q/9DwiJ3x1e60GfSUOm+DGuuId/X9RiBVEgXoOtjCQu1f QOu1EY2oI5DMICYic5GC9hznLU/aKX9qY9mgy39bHz+/ayHrG0ocjMOm3RDJA9dLLY 4S6qrKDfW7e9a/K35M1QayTheDJQRRrrRRK91gJw= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by sourceware.org (Postfix) with ESMTPS id 906C6385C8B1 for ; Thu, 1 Jul 2021 06:16:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 906C6385C8B1 X-IronPort-AV: E=McAfee;i="6200,9189,10031"; a="205474380" X-IronPort-AV: E=Sophos;i="5.83,313,1616482800"; d="scan'208";a="205474380" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jun 2021 23:16:56 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.83,313,1616482800"; d="scan'208";a="641961901" Received: from scymds01.sc.intel.com ([10.148.94.138]) by fmsmga006.fm.intel.com with ESMTP; 30 Jun 2021 23:16:55 -0700 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.236.50]) by scymds01.sc.intel.com with ESMTP id 1616Gmeg031625; Wed, 30 Jun 2021 23:16:54 -0700 To: gcc-patches@gcc.gnu.org Subject: [PATCH 03/62] AVX512FP16: Fix HF vector passing in variable arguments. Date: Thu, 1 Jul 2021 14:15:49 +0800 Message-Id: <20210701061648.9447-4-hongtao.liu@intel.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20210701061648.9447-1-hongtao.liu@intel.com> References: <20210701061648.9447-1-hongtao.liu@intel.com> X-Spam-Status: No, score=-15.0 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: "Liu, Hongtao" Reply-To: liuhongt Cc: jakub@redhat.com Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" From: "H.J. Lu" gcc/ChangeLog: * config/i386/i386.c (function_arg_advance_64): Allow V16HFmode and V32HFmode. (function_arg_64): Likewise. (ix86_gimplify_va_arg): Likewise. gcc/testsuite/ChangeLog: * gcc.target/i386/avx512fp16-vararg-1.c: New test. * gcc.target/i386/avx512fp16-vararg-2.c: Ditto. * gcc.target/i386/avx512fp16-vararg-3.c: Ditto. * gcc.target/i386/avx512fp16-vararg-4.c: Ditto. --- gcc/config/i386/i386.c | 8 +- .../gcc.target/i386/avx512fp16-vararg-1.c | 122 ++++++++++++++++++ .../gcc.target/i386/avx512fp16-vararg-2.c | 107 +++++++++++++++ .../gcc.target/i386/avx512fp16-vararg-3.c | 114 ++++++++++++++++ .../gcc.target/i386/avx512fp16-vararg-4.c | 115 +++++++++++++++++ 5 files changed, 465 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vararg-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vararg-2.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vararg-3.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-vararg-4.c diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 021283e6f39..79e6880d9dd 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -2908,7 +2908,9 @@ function_arg_advance_64 (CUMULATIVE_ARGS *cum, machine_mode mode, /* Unnamed 512 and 256bit vector mode parameters are passed on stack. */ if (!named && (VALID_AVX512F_REG_MODE (mode) - || VALID_AVX256_REG_MODE (mode))) + || VALID_AVX256_REG_MODE (mode) + || mode == V16HFmode + || mode == V32HFmode)) return 0; if (!examine_argument (mode, type, 0, &int_nregs, &sse_nregs) @@ -3167,6 +3169,8 @@ function_arg_64 (const CUMULATIVE_ARGS *cum, machine_mode mode, case E_V32HImode: case E_V8DFmode: case E_V8DImode: + case E_V16HFmode: + case E_V32HFmode: /* Unnamed 256 and 512bit vector mode parameters are passed on stack. */ if (!named) return NULL; @@ -4658,6 +4662,8 @@ ix86_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p, case E_V32HImode: case E_V8DFmode: case E_V8DImode: + case E_V16HFmode: + case E_V32HFmode: /* Unnamed 256 and 512bit vector mode parameters are passed on stack. */ if (!TARGET_64BIT_MS_ABI) { diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vararg-1.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vararg-1.c new file mode 100644 index 00000000000..9bd366838b9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vararg-1.c @@ -0,0 +1,122 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx512fp16 } */ +/* { dg-options "-mavx512fp16" } */ + +#include +#include + +static void do_test (void); + +#define DO_TEST do_test +#define AVX512FP16 +#include "avx512-check.h" + +struct m256h +{ + __m256h v; +}; + +__m128 n1 = { -283.3, -23.3, 213.4, 1119.03 }; +struct m256h n2 = { { -93.83f16, 893.318f16, 3994.3f16, -39484.0f16, 213.4f16, 323.4f16, 42.5f16, -43.4f16, + 234.4f16, 93.9f16, 34.5f16, -14.5f16, -34.9f16, -421.0f16, 234.5f16, 214.5f16 } }; +__m128h n3 = { 11.5f16, -31.80f16, 242.3f16, 136.4f16, 42.8f16, -22.8f16, 343.8f16, 215.4f16 } ; +_Float16 n4 = 32.4f16; +double n5 = 103.3; +__m128h n6 = { -12.3f16, 2.0f16, 245.9f16, -432.1f16, 53.5f16, -13.4f16, 432.5f16, 482.4f16 }; +__m128d n7 = { -91.387, -8193.518 }; +struct m256h n8 = { { -93.83f16, 893.318f16, 3994.3f16, -39484.0f16, 213.4f16, 323.4f16, 42.5f16, -43.4f16, + 234.4f16, 93.9f16, 34.5f16, -14.5f16, -34.9f16, -421.0f16, 234.5f16, 214.5f16 } }; +__m128 n9 = { -123.3, 2.3, 3.4, -10.03 }; +__m128h n10 = { 123.3f16, -100.0f16, 246.9f16, 13.4f16, -134.4f16, 35.4f16, 156.5f16, 953.1f16 }; +_Float16 n11 = 40.7f16; +double n12 = 304.9; +__m128h n13 = { 23.3f16, -11.0f16, 24.5f16, -24.5f16, 535.4f16, 35.4f16, -13.4f16, 14.5f16 }; +__m256h n14 = { -123.3f16, 23.9f16, 34.4f16, -100.3f16, 284.4f16, 352.5f16, 131.5f16, -13.2f16, + 131.4f16, 382.5f16, 38.5f16, 99.6f16, 423.2f16, -12.44f16, 43.2f16, -34.45f16 }; +__m512h n15 = { -39.3f16, -180.9f16, 13.4f16, 35.4f16, -41.1f16, -14.4f16, 24.5f16, 53.54f16, + 238.4f16, -134.8f16, 24.5f16, 35.6f16, -346.7f16, -43.4f16, -535.3f16, 324.7f16, + 82.5f16, 21.4f16, 24.4f16, 53.4f16, 23.5f16, -24.4f16, -34.5f16, -32.5f16, + 23.6f16, -13.4f16, 24.5f16, 35.5f16, -34.4f16, -24.5f16, -34.5f16, 13.5f16 }; +__m128d n16 = { 73.0, 63.18 }; +__m256 n17 = { -183.3, -22.3, 13.9, -119.3, 483.1, 122.3, -33.4, -9.37 }; +__m128 n18 = { -183.3, 22.3, 13.4, -19.03 }; + +__m128 e1; +struct m256h e2; +__m128h e3; +_Float16 e4; +double e5; +__m128h e6; +__m128d e7; +struct m256h e8; +__m128 e9; +__m128h e10; +_Float16 e11; +double e12; +__m128h e13; +__m256h e14; +__m512h e15; +__m128d e16; +__m256 e17; +__m128 e18; + +static void +__attribute__((noinline)) +foo (va_list va_arglist) +{ + e4 = va_arg (va_arglist, _Float16); + e5 = va_arg (va_arglist, double); + e6 = va_arg (va_arglist, __m128h); + e7 = va_arg (va_arglist, __m128d); + e8 = va_arg (va_arglist, struct m256h); + e9 = va_arg (va_arglist, __m128); + e10 = va_arg (va_arglist, __m128h); + e11 = va_arg (va_arglist, _Float16); + e12 = va_arg (va_arglist, double); + e13 = va_arg (va_arglist, __m128h); + e14 = va_arg (va_arglist, __m256h); + e15 = va_arg (va_arglist, __m512h); + e16 = va_arg (va_arglist, __m128d); + e17 = va_arg (va_arglist, __m256); + e18 = va_arg (va_arglist, __m128); + va_end (va_arglist); +} + +static void +__attribute__((noinline)) +test (__m128 a1, struct m256h a2, __m128h a3, ...) +{ + va_list va_arglist; + + e1 = a1; + e2 = a2; + e3 = a3; + va_start (va_arglist, a3); + foo (va_arglist); + va_end (va_arglist); +} + +static void +do_test (void) +{ + test (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12, + n13, n14, n15, n16, n17, n18); + assert (__builtin_memcmp (&e1, &n1, sizeof (e1)) == 0); + assert (__builtin_memcmp (&e2, &n2, sizeof (e2)) == 0); + assert (__builtin_memcmp (&e3, &n3, sizeof (e3)) == 0); + assert (n4 == e4); + assert (n5 == e5); + assert (__builtin_memcmp (&e6, &n6, sizeof (e6)) == 0); + assert (__builtin_memcmp (&e7, &n7, sizeof (e7)) == 0); + assert (__builtin_memcmp (&e8, &n8, sizeof (e8)) == 0); + assert (__builtin_memcmp (&e9, &n9, sizeof (e9)) == 0); + assert (__builtin_memcmp (&e10, &n10, sizeof (e10)) == 0); + assert (n11 == e11); + assert (n12 == e12); + assert (__builtin_memcmp (&e13, &n13, sizeof (e13)) == 0); + assert (__builtin_memcmp (&e14, &n14, sizeof (e14)) == 0); + assert (__builtin_memcmp (&e15, &n15, sizeof (e15)) == 0); + assert (__builtin_memcmp (&e16, &n16, sizeof (e16)) == 0); + assert (__builtin_memcmp (&e17, &n17, sizeof (e17)) == 0); + assert (__builtin_memcmp (&e18, &n18, sizeof (e18)) == 0); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vararg-2.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vararg-2.c new file mode 100644 index 00000000000..043f1c75d00 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vararg-2.c @@ -0,0 +1,107 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx512fp16 } */ +/* { dg-options "-mavx512fp16" } */ + +#include +#include + +static void do_test (void); + +#define DO_TEST do_test +#define AVX512FP16 +#include "avx512-check.h" + +__m128 n1 = { -283.3, -23.3, 213.4, 1119.03 }; +__m256d n2 = { -93.83, 893.318, 3994.3, -39484.0 }; +__m128h n3 = { 11.5f16, -31.80f16, 242.3f16, 136.4f16, 42.8f16, -22.8f16, 343.8f16, 215.4f16 } ; +_Float16 n4 = 32.4f16; +double n5 = 103.3; +__m128h n6 = { -12.3f16, 2.0f16, 245.9f16, -432.1f16, 53.5f16, -13.4f16, 432.5f16, 482.4f16 }; +__m128d n7 = { -91.387, -8193.518 }; +__m256d n8 = { -123.3, 2.3, 3.4, -10.03 }; +__m128 n9 = { -123.3, 2.3, 3.4, -10.03 }; +__m128h n10 = { 123.3f16, -100.0f16, 246.9f16, 13.4f16, -134.4f16, 35.4f16, 156.5f16, 953.1f16 }; +_Float16 n11 = 40.7f16; +double n12 = 304.9; +__m128h n13 = { 23.3f16, -11.0f16, 24.5f16, -24.5f16, 535.4f16, 35.4f16, -13.4f16, 14.5f16 }; +__m256h n14 = { -123.3f16, 23.9f16, 34.4f16, -100.3f16, 284.4f16, 352.5f16, 131.5f16, -13.2f16, + 131.4f16, 382.5f16, 38.5f16, 99.6f16, 423.2f16, -12.44f16, 43.2f16, -34.45f16 }; +__m512h n15 = { -39.3f16, -180.9f16, 13.4f16, 35.4f16, -41.1f16, -14.4f16, 24.5f16, 53.54f16, + 238.4f16, -134.8f16, 24.5f16, 35.6f16, -346.7f16, -43.4f16, -535.3f16, 324.7f16, + 82.5f16, 21.4f16, 24.4f16, 53.4f16, 23.5f16, -24.4f16, -34.5f16, -32.5f16, + 23.6f16, -13.4f16, 24.5f16, 35.5f16, -34.4f16, -24.5f16, -34.5f16, 13.5f16 }; +__m128d n16 = { 73.0, 63.18 }; +__m256 n17 = { -183.3, -22.3, 13.9, -119.3, 483.1, 122.3, -33.4, -9.37 }; +__m128 n18 = { -183.3, 22.3, 13.4, -19.03 }; + +__m128 e1; +__m256d e2; +__m128h e3; +_Float16 e4; +double e5; +__m128h e6; +__m128d e7; +__m256d e8; +__m128 e9; +__m128h e10; +_Float16 e11; +double e12; +__m128h e13; +__m256h e14; +__m512h e15; +__m128d e16; +__m256 e17; +__m128 e18; + +static void +__attribute__((noinline)) +test (__m128 a1, __m256d a2, __m128h a3, ...) +{ + va_list va_arglist; + + e1 = a1; + e2 = a2; + e3 = a3; + va_start (va_arglist, a3); + e4 = va_arg (va_arglist, _Float16); + e5 = va_arg (va_arglist, double); + e6 = va_arg (va_arglist, __m128h); + e7 = va_arg (va_arglist, __m128d); + e8 = va_arg (va_arglist, __m256d); + e9 = va_arg (va_arglist, __m128); + e10 = va_arg (va_arglist, __m128h); + e11 = va_arg (va_arglist, _Float16); + e12 = va_arg (va_arglist, double); + e13 = va_arg (va_arglist, __m128h); + e14 = va_arg (va_arglist, __m256h); + e15 = va_arg (va_arglist, __m512h); + e16 = va_arg (va_arglist, __m128d); + e17 = va_arg (va_arglist, __m256); + e18 = va_arg (va_arglist, __m128); + va_end (va_arglist); +} + +static void +do_test (void) +{ + test (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12, + n13, n14, n15, n16, n17, n18); + assert (__builtin_memcmp (&e1, &n1, sizeof (e1)) == 0); + assert (__builtin_memcmp (&e2, &n2, sizeof (e2)) == 0); + assert (__builtin_memcmp (&e3, &n3, sizeof (e3)) == 0); + assert (n4 == e4); + assert (n5 == e5); + assert (__builtin_memcmp (&e6, &n6, sizeof (e6)) == 0); + assert (__builtin_memcmp (&e7, &n7, sizeof (e7)) == 0); + assert (__builtin_memcmp (&e8, &n8, sizeof (e8)) == 0); + assert (__builtin_memcmp (&e9, &n9, sizeof (e9)) == 0); + assert (__builtin_memcmp (&e10, &n10, sizeof (e10)) == 0); + assert (n11 == e11); + assert (n12 == e12); + assert (__builtin_memcmp (&e13, &n13, sizeof (e13)) == 0); + assert (__builtin_memcmp (&e14, &n14, sizeof (e14)) == 0); + assert (__builtin_memcmp (&e15, &n15, sizeof (e15)) == 0); + assert (__builtin_memcmp (&e16, &n16, sizeof (e16)) == 0); + assert (__builtin_memcmp (&e17, &n17, sizeof (e17)) == 0); + assert (__builtin_memcmp (&e18, &n18, sizeof (e18)) == 0); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vararg-3.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vararg-3.c new file mode 100644 index 00000000000..cb414a97753 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vararg-3.c @@ -0,0 +1,114 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx512fp16 } */ +/* { dg-options "-mavx512fp16" } */ + +#include +#include + +static void do_test (void); + +#define DO_TEST do_test +#define AVX512FP16 +#include "avx512-check.h" + +struct m256h +{ + __m256h v; +}; + +__m128 n1 = { -283.3, -23.3, 213.4, 1119.03 }; +struct m256h n2 = { { -93.83f16, 893.318f16, 3994.3f16, -39484.0f16, 213.4f16, 323.4f16, 42.5f16, -43.4f16, + 234.4f16, 93.9f16, 34.5f16, -14.5f16, -34.9f16, -421.0f16, 234.5f16, 214.5f16 } }; +__m128h n3 = { 11.5f16, -31.80f16, 242.3f16, 136.4f16, 42.8f16, -22.8f16, 343.8f16, 215.4f16 } ; +_Float16 n4 = 32.4f16; +double n5 = 103.3; +__m128h n6 = { -12.3f16, 2.0f16, 245.9f16, -432.1f16, 53.5f16, -13.4f16, 432.5f16, 482.4f16 }; +__m128d n7 = { -91.387, -8193.518 }; +struct m256h n8 = { { -93.83f16, 893.318f16, 3994.3f16, -39484.0f16, 213.4f16, 323.4f16, 42.5f16, -43.4f16, + 234.4f16, 93.9f16, 34.5f16, -14.5f16, -34.9f16, -421.0f16, 234.5f16, 214.5f16 } }; +__m128 n9 = { -123.3, 2.3, 3.4, -10.03 }; +__m128h n10 = { 123.3f16, -100.0f16, 246.9f16, 13.4f16, -134.4f16, 35.4f16, 156.5f16, 953.1f16 }; +_Float16 n11 = 40.7f16; +double n12 = 304.9; +__m128h n13 = { 23.3f16, -11.0f16, 24.5f16, -24.5f16, 535.4f16, 35.4f16, -13.4f16, 14.5f16 }; +__m256h n14 = { -123.3f16, 23.9f16, 34.4f16, -100.3f16, 284.4f16, 352.5f16, 131.5f16, -13.2f16, + 131.4f16, 382.5f16, 38.5f16, 99.6f16, 423.2f16, -12.44f16, 43.2f16, -34.45f16 }; +__m512h n15 = { -39.3f16, -180.9f16, 13.4f16, 35.4f16, -41.1f16, -14.4f16, 24.5f16, 53.54f16, + 238.4f16, -134.8f16, 24.5f16, 35.6f16, -346.7f16, -43.4f16, -535.3f16, 324.7f16, + 82.5f16, 21.4f16, 24.4f16, 53.4f16, 23.5f16, -24.4f16, -34.5f16, -32.5f16, + 23.6f16, -13.4f16, 24.5f16, 35.5f16, -34.4f16, -24.5f16, -34.5f16, 13.5f16 }; +__m128d n16 = { 73.0, 63.18 }; +__m256 n17 = { -183.3, -22.3, 13.9, -119.3, 483.1, 122.3, -33.4, -9.37 }; +__m128 n18 = { -183.3, 22.3, 13.4, -19.03 }; + +__m128 e1; +struct m256h e2; +__m128h e3; +_Float16 e4; +double e5; +__m128h e6; +__m128d e7; +struct m256h e8; +__m128 e9; +__m128h e10; +_Float16 e11; +double e12; +__m128h e13; +__m256h e14; +__m512h e15; +__m128d e16; +__m256 e17; +__m128 e18; + +static void +__attribute__((noinline)) +test (__m128 a1, struct m256h a2, __m128h a3, ...) +{ + va_list va_arglist; + + e1 = a1; + e2 = a2; + e3 = a3; + va_start (va_arglist, a3); + e4 = va_arg (va_arglist, _Float16); + e5 = va_arg (va_arglist, double); + e6 = va_arg (va_arglist, __m128h); + e7 = va_arg (va_arglist, __m128d); + e8 = va_arg (va_arglist, struct m256h); + e9 = va_arg (va_arglist, __m128); + e10 = va_arg (va_arglist, __m128h); + e11 = va_arg (va_arglist, _Float16); + e12 = va_arg (va_arglist, double); + e13 = va_arg (va_arglist, __m128h); + e14 = va_arg (va_arglist, __m256h); + e15 = va_arg (va_arglist, __m512h); + e16 = va_arg (va_arglist, __m128d); + e17 = va_arg (va_arglist, __m256); + e18 = va_arg (va_arglist, __m128); + va_end (va_arglist); +} + +static void +do_test (void) +{ + test (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12, + n13, n14, n15, n16, n17, n18); + assert (__builtin_memcmp (&e1, &n1, sizeof (e1)) == 0); + assert (__builtin_memcmp (&e2, &n2, sizeof (e2)) == 0); + assert (__builtin_memcmp (&e3, &n3, sizeof (e3)) == 0); + assert (n4 == e4); + assert (n5 == e5); + assert (__builtin_memcmp (&e6, &n6, sizeof (e6)) == 0); + assert (__builtin_memcmp (&e7, &n7, sizeof (e7)) == 0); + assert (__builtin_memcmp (&e8, &n8, sizeof (e8)) == 0); + assert (__builtin_memcmp (&e9, &n9, sizeof (e9)) == 0); + assert (__builtin_memcmp (&e10, &n10, sizeof (e10)) == 0); + assert (n11 == e11); + assert (n12 == e12); + assert (__builtin_memcmp (&e13, &n13, sizeof (e13)) == 0); + assert (__builtin_memcmp (&e14, &n14, sizeof (e14)) == 0); + assert (__builtin_memcmp (&e15, &n15, sizeof (e15)) == 0); + assert (__builtin_memcmp (&e16, &n16, sizeof (e16)) == 0); + assert (__builtin_memcmp (&e17, &n17, sizeof (e17)) == 0); + assert (__builtin_memcmp (&e18, &n18, sizeof (e18)) == 0); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vararg-4.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vararg-4.c new file mode 100644 index 00000000000..962c2bf031d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vararg-4.c @@ -0,0 +1,115 @@ +/* { dg-do run } */ +/* { dg-require-effective-target avx512fp16 } */ +/* { dg-options "-mavx512fp16" } */ + +#include +#include + +static void do_test (void); + +#define DO_TEST do_test +#define AVX512FP16 +#include "avx512-check.h" + +__m128 n1 = { -283.3, -23.3, 213.4, 1119.03 }; +__m256d n2 = { -93.83, 893.318, 3994.3, -39484.0 }; +__m128h n3 = { 11.5f16, -31.80f16, 242.3f16, 136.4f16, 42.8f16, -22.8f16, 343.8f16, 215.4f16 } ; +_Float16 n4 = 32.4f16; +double n5 = 103.3; +__m128h n6 = { -12.3f16, 2.0f16, 245.9f16, -432.1f16, 53.5f16, -13.4f16, 432.5f16, 482.4f16 }; +__m128d n7 = { -91.387, -8193.518 }; +__m256d n8 = { -123.3, 2.3, 3.4, -10.03 }; +__m128 n9 = { -123.3, 2.3, 3.4, -10.03 }; +__m128h n10 = { 123.3f16, -100.0f16, 246.9f16, 13.4f16, -134.4f16, 35.4f16, 156.5f16, 953.1f16 }; +_Float16 n11 = 40.7f16; +double n12 = 304.9; +__m128h n13 = { 23.3f16, -11.0f16, 24.5f16, -24.5f16, 535.4f16, 35.4f16, -13.4f16, 14.5f16 }; +__m256h n14 = { -123.3f16, 23.9f16, 34.4f16, -100.3f16, 284.4f16, 352.5f16, 131.5f16, -13.2f16, + 131.4f16, 382.5f16, 38.5f16, 99.6f16, 423.2f16, -12.44f16, 43.2f16, -34.45f16 }; +__m512h n15 = { -39.3f16, -180.9f16, 13.4f16, 35.4f16, -41.1f16, -14.4f16, 24.5f16, 53.54f16, + 238.4f16, -134.8f16, 24.5f16, 35.6f16, -346.7f16, -43.4f16, -535.3f16, 324.7f16, + 82.5f16, 21.4f16, 24.4f16, 53.4f16, 23.5f16, -24.4f16, -34.5f16, -32.5f16, + 23.6f16, -13.4f16, 24.5f16, 35.5f16, -34.4f16, -24.5f16, -34.5f16, 13.5f16 }; +__m128d n16 = { 73.0, 63.18 }; +__m256 n17 = { -183.3, -22.3, 13.9, -119.3, 483.1, 122.3, -33.4, -9.37 }; +__m128 n18 = { -183.3, 22.3, 13.4, -19.03 }; + +__m128 e1; +__m256d e2; +__m128h e3; +_Float16 e4; +double e5; +__m128h e6; +__m128d e7; +__m256d e8; +__m128 e9; +__m128h e10; +_Float16 e11; +double e12; +__m128h e13; +__m256h e14; +__m512h e15; +__m128d e16; +__m256 e17; +__m128 e18; + +static void +__attribute__((noinline)) +foo (va_list va_arglist) +{ + e4 = va_arg (va_arglist, _Float16); + e5 = va_arg (va_arglist, double); + e6 = va_arg (va_arglist, __m128h); + e7 = va_arg (va_arglist, __m128d); + e8 = va_arg (va_arglist, __m256d); + e9 = va_arg (va_arglist, __m128); + e10 = va_arg (va_arglist, __m128h); + e11 = va_arg (va_arglist, _Float16); + e12 = va_arg (va_arglist, double); + e13 = va_arg (va_arglist, __m128h); + e14 = va_arg (va_arglist, __m256h); + e15 = va_arg (va_arglist, __m512h); + e16 = va_arg (va_arglist, __m128d); + e17 = va_arg (va_arglist, __m256); + e18 = va_arg (va_arglist, __m128); + va_end (va_arglist); +} + +static void +__attribute__((noinline)) +test (__m128 a1, __m256d a2, __m128h a3, ...) +{ + va_list va_arglist; + + e1 = a1; + e2 = a2; + e3 = a3; + va_start (va_arglist, a3); + foo (va_arglist); + va_end (va_arglist); +} + +static void +do_test (void) +{ + test (n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n12, + n13, n14, n15, n16, n17, n18); + assert (__builtin_memcmp (&e1, &n1, sizeof (e1)) == 0); + assert (__builtin_memcmp (&e2, &n2, sizeof (e2)) == 0); + assert (__builtin_memcmp (&e3, &n3, sizeof (e3)) == 0); + assert (n4 == e4); + assert (n5 == e5); + assert (__builtin_memcmp (&e6, &n6, sizeof (e6)) == 0); + assert (__builtin_memcmp (&e7, &n7, sizeof (e7)) == 0); + assert (__builtin_memcmp (&e8, &n8, sizeof (e8)) == 0); + assert (__builtin_memcmp (&e9, &n9, sizeof (e9)) == 0); + assert (__builtin_memcmp (&e10, &n10, sizeof (e10)) == 0); + assert (n11 == e11); + assert (n12 == e12); + assert (__builtin_memcmp (&e13, &n13, sizeof (e13)) == 0); + assert (__builtin_memcmp (&e14, &n14, sizeof (e14)) == 0); + assert (__builtin_memcmp (&e15, &n15, sizeof (e15)) == 0); + assert (__builtin_memcmp (&e16, &n16, sizeof (e16)) == 0); + assert (__builtin_memcmp (&e17, &n17, sizeof (e17)) == 0); + assert (__builtin_memcmp (&e18, &n18, sizeof (e18)) == 0); +}