[17/62] AVX512FP16: Add testcase for vsqrtph/vsqrtsh/vrsqrtph/vrsqrtsh.

diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vrsqrtph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vrsqrtph-1a.c
new file mode 100644
index 00000000000..c9671e8ed0a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vrsqrtph-1a.c
@@ -0,0 +1,19 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vrsqrtph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vrsqrtph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vrsqrtph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512h res;
+volatile __m512h x1;
+volatile __mmask32 m32;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_rsqrt_ph (x1);
+  res = _mm512_mask_rsqrt_ph (res, m32, x1);
+  res = _mm512_maskz_rsqrt_ph (m32, x1);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vrsqrtph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vrsqrtph-1b.c
new file mode 100644
index 00000000000..237971dbaa7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vrsqrtph-1b.c
@@ -0,0 +1,77 @@ 
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS (AVX512F_LEN / 16)
+
+void NOINLINE
+EMULATE(rsqrt_ph) (V512 * dest, V512 op1,
+		 __mmask32 k, int zero_mask)
+{
+  V512 v1, v2, v3, v4, v5, v6, v7, v8;
+  int i;
+  __mmask16 m1, m2;
+
+  m1 = k & 0xffff;
+  m2 = (k >> 16) & 0xffff;
+
+  unpack_ph_2twops(op1, &v1, &v2);
+  unpack_ph_2twops(*dest, &v7, &v8);
+
+  for (i = 0; i < 16; i++) {
+    if (((1 << i) & m1) == 0) {
+      if (zero_mask) {
+	v5.f32[i] = 0;
+      }
+      else {
+	v5.u32[i] = v7.u32[i];
+      }
+    }
+    else {
+      v5.f32[i] = 1. / sqrtf(v1.f32[i]);
+    }
+
+    if (((1 << i) & m2) == 0) {
+      if (zero_mask) {
+	v6.f32[i] = 0;
+      }
+      else {
+	v6.u32[i] = v8.u32[i];
+      }
+    }
+    else {
+      v6.f32[i] = 1. / sqrtf(v2.f32[i]);
+    }
+
+  }
+  *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+TEST (void)
+{
+  V512 res;
+  V512 exp;
+
+  init_src();
+
+  EMULATE(rsqrt_ph) (&exp, src1,  NET_MASK, 0);
+  HF(res) = INTRINSIC (_rsqrt_ph) (HF(src1));
+  CHECK_RESULT (&res, &exp, N_ELEMS, _rsqrt_ph);
+
+  init_dest(&res, &exp);
+  EMULATE(rsqrt_ph) (&exp, src1, MASK_VALUE, 0);
+  HF(res) = INTRINSIC (_mask_rsqrt_ph) (HF(res), MASK_VALUE, HF(src1));
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mask_rsqrt_ph);
+
+  EMULATE(rsqrt_ph) (&exp, src1,  ZMASK_VALUE, 1);
+  HF(res) = INTRINSIC (_maskz_rsqrt_ph) (ZMASK_VALUE, HF(src1));
+  CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_rsqrt_ph);
+
+  if (n_errs != 0)
+    abort ();
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vrsqrtsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vrsqrtsh-1a.c
new file mode 100644
index 00000000000..060ce33f164
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vrsqrtsh-1a.c
@@ -0,0 +1,18 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vrsqrtsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vrsqrtsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vrsqrtsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h res, x1, x2;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm_rsqrt_sh (x1, x2);
+  res = _mm_mask_rsqrt_sh (res, m8, x1, x2);
+  res = _mm_maskz_rsqrt_sh (m8, x1, x2);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vrsqrtsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vrsqrtsh-1b.c
new file mode 100644
index 00000000000..5f20de7c24a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vrsqrtsh-1b.c
@@ -0,0 +1,59 @@ 
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+emulate_rsqrt_sh(V512 * dest, V512 op1,
+                __mmask8 k, int zero_mask)
+{
+    V512 v1, v2, v3, v4, v5, v6, v7, v8;
+    int i;
+
+    unpack_ph_2twops(op1, &v1, &v2);
+    unpack_ph_2twops(*dest, &v7, &v8);
+
+    if ((k&1) || !k)
+      v5.f32[0] = 1.0 / sqrtf(v1.f32[0]);
+    else if (zero_mask)
+      v5.f32[0] = 0;
+    else
+      v5.f32[0] = v7.f32[0];
+
+    for (i = 1; i < 8; i++)
+      v5.f32[i] = v1.f32[i];
+
+    *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+test_512 (void)
+{
+  V512 res;
+  V512 exp;
+
+  init_src();
+
+  emulate_rsqrt_sh(&exp, src1,  0x1, 0);
+  res.xmmh[0] = _mm_rsqrt_sh(exp.xmmh[0], src1.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_rsqrt_sh");
+
+  init_dest(&res, &exp);
+  emulate_rsqrt_sh(&exp, src1,  0x1, 0);
+  res.xmmh[0] = _mm_mask_rsqrt_sh(res.xmmh[0], 0x1, exp.xmmh[0], src1.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_mask_rsqrt_sh");
+
+  emulate_rsqrt_sh(&exp, src1,  0x1, 1);
+  res.xmmh[0] = _mm_maskz_rsqrt_sh(0x1, exp.xmmh[0], src1.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_maskz_rsqrt_sh");
+
+  if (n_errs != 0) {
+      abort ();
+  }
+
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vsqrtph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vsqrtph-1a.c
new file mode 100644
index 00000000000..497b5bab1db
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vsqrtph-1a.c
@@ -0,0 +1,24 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512h res;
+volatile __m512h x1;
+volatile __mmask32 m32;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm512_sqrt_ph (x1);
+  res = _mm512_mask_sqrt_ph (res, m32, x1);
+  res = _mm512_maskz_sqrt_ph (m32, x1);
+  res = _mm512_sqrt_round_ph (x1, 4);
+  res = _mm512_mask_sqrt_round_ph (res, m32, x1, 8);
+  res = _mm512_maskz_sqrt_round_ph (m32, x1, 11);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vsqrtph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vsqrtph-1b.c
new file mode 100644
index 00000000000..d4d047b194d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vsqrtph-1b.c
@@ -0,0 +1,92 @@ 
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS (AVX512F_LEN / 16)
+
+void NOINLINE
+EMULATE(sqrt_ph) (V512 * dest, V512 op1,
+		__mmask32 k, int zero_mask)
+{
+  V512 v1, v2, v3, v4, v5, v6, v7, v8;
+  int i;
+  __mmask16 m1, m2;
+
+  m1 = k & 0xffff;
+  m2 = (k >> 16) & 0xffff;
+
+  unpack_ph_2twops(op1, &v1, &v2);
+  unpack_ph_2twops(*dest, &v7, &v8);
+
+  for (i = 0; i < 16; i++) {
+    if (((1 << i) & m1) == 0) {
+      if (zero_mask) {
+	v5.f32[i] = 0;
+      }
+      else {
+	v5.u32[i] = v7.u32[i];
+      }
+    }
+    else {
+      v5.f32[i] = sqrtf(v1.f32[i]);
+    }
+
+    if (((1 << i) & m2) == 0) {
+      if (zero_mask) {
+	v6.f32[i] = 0;
+      }
+      else {
+	v6.u32[i] = v8.u32[i];
+      }
+    }
+    else {
+      v6.f32[i] = sqrtf(v2.f32[i]);
+    }
+
+  }
+  *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+TEST (void)
+{
+  V512 res;
+  V512 exp;
+
+  init_src();
+
+  EMULATE(sqrt_ph) (&exp, src1, NET_MASK, 0);
+  HF(res) = INTRINSIC (_sqrt_ph) (HF(src1));
+  CHECK_RESULT (&res, &exp, N_ELEMS, _sqrt_ph);
+
+  init_dest(&res, &exp);
+  EMULATE(sqrt_ph) (&exp, src1, MASK_VALUE, 0);
+  HF(res) = INTRINSIC (_mask_sqrt_ph) (HF(res), MASK_VALUE, HF(src1));
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mask_sqrt_ph);
+
+  EMULATE(sqrt_ph) (&exp, src1, ZMASK_VALUE, 1);
+  HF(res) = INTRINSIC (_maskz_sqrt_ph) (ZMASK_VALUE, HF(src1));
+  CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_sqrt_ph);
+
+#if AVX512F_LEN == 512
+  EMULATE(sqrt_ph) (&exp, src1, NET_MASK, 0);
+  HF(res) = INTRINSIC (_sqrt_round_ph) (HF(src1), 8);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _sqrt_round_ph);
+
+  init_dest(&res, &exp);
+  EMULATE(sqrt_ph) (&exp, src1, MASK_VALUE, 0);
+  HF(res) = INTRINSIC (_mask_sqrt_round_ph) (HF(res), MASK_VALUE, HF(src1), 8);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _mask_sqrt_round_ph);
+
+  EMULATE(sqrt_ph) (&exp, src1,  ZMASK_VALUE, 1);
+  HF(res) = INTRINSIC (_maskz_sqrt_round_ph) (ZMASK_VALUE, HF(src1), 8);
+  CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_sqrt_round_ph);
+#endif
+
+  if (n_errs != 0)
+    abort ();
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vsqrtsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vsqrtsh-1a.c
new file mode 100644
index 00000000000..dd44534a2eb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vsqrtsh-1a.c
@@ -0,0 +1,23 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vsqrtsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vsqrtsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vsqrtsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vsqrtsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vsqrtsh\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h res, x1, x2;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm_sqrt_sh (x1, x2);
+  res = _mm_mask_sqrt_sh (res, m8, x1, x2);
+  res = _mm_maskz_sqrt_sh (m8, x1, x2);
+  res = _mm_sqrt_round_sh (x1, x2, 4);
+  res = _mm_mask_sqrt_round_sh (res, m8, x1, x2, 8);
+  res = _mm_maskz_sqrt_round_sh (m8, x1, x2, 11);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vsqrtsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vsqrtsh-1b.c
new file mode 100644
index 00000000000..4744c6f1e55
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vsqrtsh-1b.c
@@ -0,0 +1,60 @@ 
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+emulate_sqrt_sh(V512 * dest, V512 op1,
+		__mmask8 k, int zero_mask)
+{
+  V512 v1, v2, v3, v4, v5, v6, v7, v8;
+  int i;
+
+  unpack_ph_2twops(op1, &v1, &v2);
+  unpack_ph_2twops(*dest, &v7, &v8);
+
+  if ((k&1) || !k)
+    v5.f32[0] = sqrtf(v1.f32[0]);
+  else if (zero_mask)
+    v5.f32[0] = 0;
+  else
+    v5.f32[0] = v7.f32[0];
+
+  for (i = 1; i < 8; i++)
+    v5.f32[i] = v1.f32[i];
+
+  *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+test_512 (void)
+{
+  V512 res;
+  V512 exp;
+
+  init_src();
+
+  emulate_sqrt_sh(&exp, src1,  0x1, 0);
+  res.xmmh[0] = _mm_sqrt_round_sh(exp.xmmh[0], src1.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_sqrt_round_sh");
+
+  init_dest(&res, &exp);
+  emulate_sqrt_sh(&exp, src1,  0x1, 0);
+  res.xmmh[0] = _mm_mask_sqrt_round_sh(res.xmmh[0], 0x1, exp.xmmh[0],
+                                         src1.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_mask_sqrt_round_sh");
+
+  emulate_sqrt_sh(&exp, src1,  0x1, 1);
+  res.xmmh[0] = _mm_maskz_sqrt_round_sh(0x1, exp.xmmh[0], src1.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_maskz_sqrt_round_sh");
+
+  if (n_errs != 0) {
+      abort ();
+  }
+
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vrsqrtph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vrsqrtph-1a.c
new file mode 100644
index 00000000000..a5edc176b63
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vrsqrtph-1a.c
@@ -0,0 +1,29 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */
+/* { dg-final { scan-assembler-times "vrsqrtph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vrsqrtph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vrsqrtph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vrsqrtph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vrsqrtph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vrsqrtph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256h res1;
+volatile __m128h res2;
+volatile __m256h x1;
+volatile __m128h x2;
+volatile __mmask16 m16;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+  res1 = _mm256_rsqrt_ph (x1);
+  res1 = _mm256_mask_rsqrt_ph (res1, m16, x1);
+  res1 = _mm256_maskz_rsqrt_ph (m16, x1);
+
+  res2 = _mm_rsqrt_ph (x2);
+  res2 = _mm_mask_rsqrt_ph (res2, m8, x2);
+  res2 = _mm_maskz_rsqrt_ph (m8, x2);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vrsqrtph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vrsqrtph-1b.c
new file mode 100644
index 00000000000..a5e796b8ebb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vrsqrtph-1b.c
@@ -0,0 +1,16 @@ 
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
+
+#define DEBUG
+#define AVX512VL
+#define AVX512F_LEN 256      
+#define AVX512F_LEN_HALF 128 
+#include "avx512fp16-vrsqrtph-1b.c"
+                             
+#undef AVX512F_LEN           
+#undef AVX512F_LEN_HALF      
+                             
+#define AVX512F_LEN 128      
+#define AVX512F_LEN_HALF 128 
+#include "avx512fp16-vrsqrtph-1b.c"
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vsqrtph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vsqrtph-1a.c
new file mode 100644
index 00000000000..4acb137e6b8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vsqrtph-1a.c
@@ -0,0 +1,29 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */
+/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vsqrtph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256h res1;
+volatile __m128h res2;
+volatile __m256h x1;
+volatile __m128h x2;
+volatile __mmask16 m16;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+  res1 = _mm256_sqrt_ph (x1);
+  res1 = _mm256_mask_sqrt_ph (res1, m16, x1);
+  res1 = _mm256_maskz_sqrt_ph (m16, x1);
+
+  res2 = _mm_sqrt_ph (x2);
+  res2 = _mm_mask_sqrt_ph (res2, m8, x2);
+  res2 = _mm_maskz_sqrt_ph (m8, x2);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vsqrtph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vsqrtph-1b.c
new file mode 100644
index 00000000000..9b0a91d7b5d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vsqrtph-1b.c
@@ -0,0 +1,16 @@ 
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
+
+#define DEBUG
+#define AVX512VL
+#define AVX512F_LEN 256      
+#define AVX512F_LEN_HALF 128 
+#include "avx512fp16-vsqrtph-1b.c"
+                             
+#undef AVX512F_LEN           
+#undef AVX512F_LEN_HALF      
+                             
+#define AVX512F_LEN 128      
+#define AVX512F_LEN_HALF 128 
+#include "avx512fp16-vsqrtph-1b.c"
+