[11/62] AVX512FP16: Add testcase for vaddsh/vsubsh/vmulsh/vdivsh.

diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vaddsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vaddsh-1a.c
new file mode 100644
index 00000000000..97aac3fd131
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vaddsh-1a.c
@@ -0,0 +1,27 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vaddsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vaddsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vaddsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vaddsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vaddsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vaddsh\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h res;
+volatile __m128h x1, x2;
+volatile __mmask16 m16;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm_add_sh (x1, x2);
+  res = _mm_mask_add_sh (res, m8, x1, x2);
+  res = _mm_maskz_add_sh (m8, x1, x2);
+
+  res = _mm_add_round_sh (x1, x2, 8);
+  res = _mm_mask_add_round_sh (res, m8, x1, x2, 8);
+  res = _mm_maskz_add_round_sh (m8, x1, x2, 11);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vaddsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vaddsh-1b.c
new file mode 100644
index 00000000000..724112c8fc0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vaddsh-1b.c
@@ -0,0 +1,104 @@ 
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+emulate_add_sh(V512 * dest, V512 op1, V512 op2,
+                __mmask8 k, int zero_mask)
+{
+    V512 v1, v2, v3, v4, v5, v6, v7, v8;
+    int i;
+
+    unpack_ph_2twops(op1, &v1, &v2);
+    unpack_ph_2twops(op2, &v3, &v4);
+    unpack_ph_2twops(*dest, &v7, &v8);
+
+    if ((k&1) || !k)
+      v5.f32[0] = v1.f32[0] + v3.f32[0];
+    else if (zero_mask)
+      v5.f32[0] = 0;
+    else
+      v5.f32[0] = v7.f32[0];
+   
+    for (i = 1; i < 8; i++)
+      v5.f32[i] = v1.f32[i];
+
+    *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+test_512 (void)
+{
+  V512 res;
+  V512 exp;
+
+  init_src();
+
+  emulate_add_sh(&exp, src1, src2,  0x1, 0);
+  res.xmmh[0] = _mm_add_sh(src1.xmmh[0], src2.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_add_sh");
+
+  //DEST.fp16[0] := SRC1.fp16[0] + SRC2.fp16[0]
+  emulate_add_sh(&exp, src1, src2,  0x1, 0);
+  res.xmmh[0] = _mm_mask_add_sh(res.xmmh[0], 0x1,
+			       	src1.xmmh[0], src2.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_mask_add_sh");
+
+  //dest.fp16[0] remains unchanged
+  init_dest(&res, &exp);
+  emulate_add_sh(&exp, src1, src2,  0x2, 0);
+  res.xmmh[0] = _mm_mask_add_sh(res.xmmh[0], 0x2,
+			       	src1.xmmh[0], src2.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_mask_add_sh");
+
+  //dest.fp16[0] = 0
+  emulate_add_sh(&exp, src1, src2,  0x2, 1);
+  res.xmmh[0] = _mm_maskz_add_sh(0x2, src1.xmmh[0], src2.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_maskz_add_sh");
+
+  //DEST.fp16[0] := SRC1.fp16[0] + SRC2.fp16[0]
+  emulate_add_sh(&exp, src1, src2,  0x3, 1);
+  res.xmmh[0] = _mm_maskz_add_sh(0x3, src1.xmmh[0], src2.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_maskz_add_sh");
+
+  //DEST.fp16[0] := SRC1.fp16[0] + SRC2.fp16[0]
+  emulate_add_sh(&exp, src1, src2,  0x1, 0);
+  res.xmmh[0] = _mm_add_round_sh(src1.xmmh[0], 
+				 src2.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_add_round_sh");
+
+  //DEST.fp16[0] := SRC1.fp16[0] + SRC2.fp16[0]
+  emulate_add_sh(&exp, src1, src2,  0x1, 0);
+  res.xmmh[0] = _mm_mask_add_round_sh(res.xmmh[0], 0x1, src1.xmmh[0],
+				      src2.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_mask_add_round_sh");
+
+  //dest.fp16[0] remains unchanged
+  init_dest(&res, &exp);
+  emulate_add_sh(&exp, src1, src2,  0x2, 0);
+  res.xmmh[0] = _mm_mask_add_round_sh(res.xmmh[0], 0x2, src1.xmmh[0], 
+				      src2.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_mask_add_round_sh");
+
+  //dest.fp16[0] = 0
+  emulate_add_sh(&exp, src1, src2,  0x2, 1);
+  res.xmmh[0] = _mm_maskz_add_round_sh(0x2, src1.xmmh[0], 
+				       src2.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_maskz_add_round_sh");
+
+  //DEST.fp16[0] := SRC1.fp16[0] + SRC2.fp16[0]
+  emulate_add_sh(&exp, src1, src2,  0x3, 1);
+  res.xmmh[0] = _mm_maskz_add_round_sh(0x3, src1.xmmh[0],
+				       src2.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_maskz_add_round_sh");
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vdivsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vdivsh-1a.c
new file mode 100644
index 00000000000..39f26f5d77a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vdivsh-1a.c
@@ -0,0 +1,27 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vdivsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vdivsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vdivsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vdivsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vdivsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vdivsh\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h res;
+volatile __m128h x1, x2;
+volatile __mmask16 m16;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm_div_sh (x1, x2);
+  res = _mm_mask_div_sh (res, m8, x1, x2);
+  res = _mm_maskz_div_sh (m8, x1, x2);
+
+  res = _mm_div_round_sh (x1, x2, 8);
+  res = _mm_mask_div_round_sh (res, m8, x1, x2, 8);
+  res = _mm_maskz_div_round_sh (m8, x1, x2, 11);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vdivsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vdivsh-1b.c
new file mode 100644
index 00000000000..467f5d20155
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vdivsh-1b.c
@@ -0,0 +1,76 @@ 
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+emulate_div_sh(V512 * dest, V512 op1, V512 op2,
+                __mmask8 k, int zero_mask)
+{
+    V512 v1, v2, v3, v4, v5, v6, v7, v8;
+    int i;
+
+    unpack_ph_2twops(op1, &v1, &v2);
+    unpack_ph_2twops(op2, &v3, &v4);
+    unpack_ph_2twops(*dest, &v7, &v8);
+
+    if ((k&1) || !k)
+      v5.f32[0] = v1.f32[0] / v3.f32[0];
+    else if (zero_mask)
+      v5.f32[0] = 0;
+    else
+      v5.f32[0] = v7.f32[0];
+
+    for (i = 1; i < 8; i++)
+      v5.f32[i] = v1.f32[i];
+
+    *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+test_512 (void)
+{
+  V512 res;
+  V512 exp;
+
+  init_src();
+  
+  emulate_div_sh(&exp, src1, src2,  0x1, 0);
+  res.xmmh[0] = _mm_div_sh(src1.xmmh[0], src2.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_div_sh");
+
+  init_dest(&res, &exp);
+  emulate_div_sh(&exp, src1, src2,  0x1, 0);
+  res.xmmh[0] = _mm_mask_div_sh(res.xmmh[0], 0x1, src1.xmmh[0],
+			       	src2.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_mask_div_sh");
+
+  emulate_div_sh(&exp, src1, src2,  0x3, 1);
+  res.xmmh[0] = _mm_maskz_div_sh(0x3, src1.xmmh[0], src2.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_maskz_div_sh");
+
+  emulate_div_sh(&exp, src1, src2,  0x1, 0);
+  res.xmmh[0] = _mm_div_round_sh(src1.xmmh[0], src2.xmmh[0],
+				 _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_div_sh");
+
+  init_dest(&res, &exp);
+  emulate_div_sh(&exp, src1, src2,  0x1, 0);
+  res.xmmh[0] = _mm_mask_div_round_sh(res.xmmh[0], 0x1, src1.xmmh[0],
+				      src2.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_mask_div_sh");
+  
+  emulate_div_sh(&exp, src1, src2,  0x3, 1);
+  res.xmmh[0] = _mm_maskz_div_round_sh(0x3, src1.xmmh[0],
+				       src2.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_maskz_div_sh");    
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vmulsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vmulsh-1a.c
new file mode 100644
index 00000000000..85707b5f169
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vmulsh-1a.c
@@ -0,0 +1,27 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vmulsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vmulsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vmulsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vmulsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vmulsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vmulsh\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h res;
+volatile __m128h x1, x2;
+volatile __mmask16 m16;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm_mul_sh (x1, x2);
+  res = _mm_mask_mul_sh (res, m8, x1, x2);
+  res = _mm_maskz_mul_sh (m8, x1, x2);
+
+  res = _mm_mul_round_sh (x1, x2, 8);
+  res = _mm_mask_mul_round_sh (res, m8, x1, x2, 8);
+  res = _mm_maskz_mul_round_sh (m8, x1, x2, 11);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vmulsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vmulsh-1b.c
new file mode 100644
index 00000000000..36b6930a516
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vmulsh-1b.c
@@ -0,0 +1,77 @@ 
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+emulate_mul_sh(V512 * dest, V512 op1, V512 op2,
+                __mmask8 k, int zero_mask)
+{
+    V512 v1, v2, v3, v4, v5, v6, v7, v8;
+    int i;
+
+    unpack_ph_2twops(op1, &v1, &v2);
+    unpack_ph_2twops(op2, &v3, &v4);
+    unpack_ph_2twops(*dest, &v7, &v8);
+
+    if ((k&1) || !k)
+      v5.f32[0] = v1.f32[0] * v3.f32[0];
+    else if (zero_mask)
+      v5.f32[0] = 0;
+    else
+      v5.f32[0] = v7.f32[0];
+   
+    for (i = 1; i < 8; i++)
+      v5.f32[i] = v1.f32[i];
+
+    *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+test_512 (void)
+{
+  V512 res;
+  V512 exp;
+
+  init_src();
+  
+  emulate_mul_sh(&exp, src1, src2,  0x1, 0);
+  res.xmmh[0] = _mm_mul_sh(src1.xmmh[0], src2.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_mul_sh");
+
+  init_dest(&res, &exp);
+  emulate_mul_sh(&exp, src1, src2,  0x1, 0);
+  res.xmmh[0] = _mm_mask_mul_sh(res.xmmh[0], 0x1, src1.xmmh[0],
+			       	src2.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_mask_mul_sh");
+
+  emulate_mul_sh(&exp, src1, src2,  0x3, 1);
+  res.xmmh[0] = _mm_maskz_mul_sh(0x3, src1.xmmh[0], src2.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_maskz_mul_sh");
+
+  emulate_mul_sh(&exp, src1, src2,  0x1, 0);
+  res.xmmh[0] = _mm_mul_round_sh(src1.xmmh[0], src2.xmmh[0],
+				 _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_mul_sh");
+
+  init_dest(&res, &exp);
+  emulate_mul_sh(&exp, src1, src2,  0x1, 0);
+  res.xmmh[0] = _mm_mask_mul_round_sh(res.xmmh[0], 0x1, src1.xmmh[0],
+				      src2.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_mask_mul_sh");
+
+  emulate_mul_sh(&exp, src1, src2,  0x3, 1);
+  res.xmmh[0] = _mm_maskz_mul_round_sh(0x3, src1.xmmh[0],
+				       src2.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_maskz_mul_sh");
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vsubsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vsubsh-1a.c
new file mode 100644
index 00000000000..8ea1eea615b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vsubsh-1a.c
@@ -0,0 +1,27 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vsubsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vsubsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vsubsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vsubsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vsubsh\[ \\t\]+\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vsubsh\[ \\t\]+\{rz-sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h res;
+volatile __m128h x1, x2;
+volatile __mmask16 m16;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+  res = _mm_sub_sh (x1, x2);
+  res = _mm_mask_sub_sh (res, m8, x1, x2);
+  res = _mm_maskz_sub_sh (m8, x1, x2);
+
+  res = _mm_sub_round_sh (x1, x2, 8);
+  res = _mm_mask_sub_round_sh (res, m8, x1, x2, 8);
+  res = _mm_maskz_sub_round_sh (m8, x1, x2, 11);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vsubsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vsubsh-1b.c
new file mode 100644
index 00000000000..df3680ebee1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vsubsh-1b.c
@@ -0,0 +1,76 @@ 
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+emulate_sub_sh(V512 * dest, V512 op1, V512 op2,
+                __mmask8 k, int zero_mask)
+{
+    V512 v1, v2, v3, v4, v5, v6, v7, v8;
+    int i;
+
+    unpack_ph_2twops(op1, &v1, &v2);
+    unpack_ph_2twops(op2, &v3, &v4);
+    unpack_ph_2twops(*dest, &v7, &v8);
+
+    if ((k&1) || !k)
+      v5.f32[0] = v1.f32[0] - v3.f32[0];
+    else if (zero_mask)
+      v5.f32[0] = 0;
+    else
+      v5.f32[0] = v7.f32[0];
+   
+    for (i = 1; i < 8; i++)
+      v5.f32[i] = v1.f32[i];
+
+    *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+test_512 (void)
+{
+  V512 res;
+  V512 exp;
+
+  init_src();
+
+  emulate_sub_sh(&exp, src1, src2,  0x1, 0);
+  res.xmmh[0] = _mm_sub_sh(src1.xmmh[0], src2.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_sub_sh");
+
+  init_dest(&res, &exp);
+  emulate_sub_sh(&exp, src1, src2,  0x1, 0);
+  res.xmmh[0] = _mm_mask_sub_sh(res.xmmh[0], 0x1, src1.xmmh[0],
+			       	src2.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_mask_sub_sh");
+
+  emulate_sub_sh(&exp, src1, src2,  0x3, 1);
+  res.xmmh[0] = _mm_maskz_sub_sh(0x3, src1.xmmh[0], src2.xmmh[0]);
+  check_results(&res, &exp, N_ELEMS, "_mm_maskz_sub_sh");
+
+  emulate_sub_sh(&exp, src1, src2,  0x1, 0);
+  res.xmmh[0] = _mm_sub_round_sh(src1.xmmh[0], src2.xmmh[0],
+				 _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_sub_sh");
+
+  init_dest(&res, &exp);
+  emulate_sub_sh(&exp, src1, src2,  0x1, 0);
+  res.xmmh[0] = _mm_mask_sub_round_sh(res.xmmh[0], 0x1, src1.xmmh[0],
+				      src2.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_mask_sub_sh");
+  
+  emulate_sub_sh(&exp, src1, src2,  0x3, 1);
+  res.xmmh[0] = _mm_maskz_sub_round_sh(0x3, src1.xmmh[0],
+				       src2.xmmh[0], _ROUND_NINT);
+  check_results(&res, &exp, N_ELEMS, "_mm_maskz_sub_sh");
+
+  if (n_errs != 0) {
+      abort ();
+  }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/pr54855-11.c b/gcc/testsuite/gcc.target/i386/pr54855-11.c
new file mode 100644
index 00000000000..a7095665d76
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr54855-11.c
@@ -0,0 +1,16 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512fp16" } */
+/* { dg-final { scan-assembler-times "vaddsh\[ \\t\]" 1 } } */
+/* { dg-final { scan-assembler-not "vpextrw\[ \\t\]" } } */
+/* { dg-final { scan-assembler-not "vmovw\[ \\t\]" } } */
+/* { dg-final { scan-assembler-not "vmovd\[ \\t\]" } } */
+/* { dg-final { scan-assembler-not "vpunpckldq\[ \\t\]" } } */
+/* { dg-final { scan-assembler-not "vpunpcklqdq\[ \\t\]" } } */
+
+#include <immintrin.h>
+
+__m128h
+foo (__m128h x, __m128h y)
+{
+  return _mm_add_sh (x, y);
+}